A 65nm 236.5nJ/Classification Neuromorphic Processor with 7.5% Energy Overhead On-Chip Learning Using Direct Spike-Only Feedback. - Jeongwoo Park 001; Juyun Lee; Dongsuk Jeon (ISSCC, 2019)

A 65-nm Neuromorphic Image Classification Processor With Energy-Efficient Training Through Direct Spike-Only Feedback. - Jeongwoo Park 001; Juyun Lee; Dongsuk Jeon (IEEE J. Solid State Circuits, 2020)

A 40nm 4.81TFLOPS/W 8b Floating-Point Training Processor for Non-Sparse Neural Networks Using Shared Exponent Bias and 24-Way Fused Multiply-Add Tree. - Jeongwoo Park 001; Sunwoo Lee 005; Dongsuk Jeon (ISSCC, 2021)

Activation Sharing with Asymmetric Paths Solves Weight Transport Problem without Bidirectional Connection. - Sunghyeon Woo; Jeongwoo Park 001; Jiwoo Hong; Dongsuk Jeon (NeurIPS, 2021)

A low power neural network training processor with 8-bit floating point with a shared exponent bias and fused multiply add trees. - Jeongwoo Park 001; Sunwoo Lee 005; Dongsuk Jeon (AICAS, 2022)

A 28nm 1.644TFLOPS/W Floating-Point Computation SRAM Macro with Variable Precision for Deep Neural Network Inference and Training. - Sangsu Jeong; Jeongwoo Park 001; Dongsuk Jeon (ESSCIRC, 2022)

Toward Efficient Low-Precision Training: Data Format Optimization and Hysteresis Quantization. - Sunwoo Lee 005; Jeongwoo Park 001; Dongsuk Jeon (ICLR, 2022)

A Neural Network Training Processor With 8-Bit Shared Exponent Bias Floating Point and Multiple-Way Fused Multiply-Add Trees. - Jeongwoo Park 001; Sunwoo Lee 005; Dongsuk Jeon (IEEE J. Solid State Circuits, 2022)

A 4.27TFLOPS/W FP4/FP8 Hybrid-Precision Neural Network Training Processor Using Shift-Add MAC and Reconfigurable PE Array. - Sunwoo Lee 005; Jeongwoo Park 001; Dongsuk Jeon (ESSCIRC, 2023)

A0.81 mm2 740μW Real-Time Speech Enhancement Processor Using Multiplier-Less PE Arrays for Hearing Aids in 28nm CMOS. - Sungjin Park; Sunwoo Lee 005; Jeongwoo Park 001; Hyeong-Seok Choi; Dongsuk Jeon (ISSCC, 2023)

MHC : Multi-flit HBM Crossbar with Enhancing Performance and Resource Utilization. - Jaehun Jung; Jin-Hyeong Park; Young-Gil Jeong; Jeongwoo Park 001 (ISOCC, 2024)

RGHT-Q: Reconfigurable GEMM Unit for Heterogeneous-Homogeneous Tensor Quantization. - Seungho Lee; Donghyun Nam; Jeongwoo Park 001 (DATE, 2025)

A Real-Time Speech Enhancement Processor for Hearing Aids in 28-nm CMOS. - Sungjin Park; Sunwoo Lee 005; Jeongwoo Park 001; Hyeong-Seok Choi; Kyogu Lee; Dongsuk Jeon (IEEE J. Solid State Circuits, 2025)

CLAT: A Clustering-Based Attention Transformer Accelerator for Low-Latency Text Generation in LLMs. - Sunwoo Lee 005; Beomseok Kim; Jeongwoo Park 001; Dongsuk Jeon (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

BOA-3DGS: Backward-Striding Optimized Accelerator for Reduced Memory Contention in 3D Gaussian Splatting Training. - Hyuk Jun Kweon; Jongyeop Kim; Jeongwoo Park 001 (ASP-DAC, 2026)

H2NoC: A Hybrid NoC Architecture for FPGAs with Hardened Interconnects. - Jinhyeong Park; Younggil Jeong; Jeongwoo Park 001 (ASP-DAC, 2026)