Parallel image processing field programmable gate array for real time image processing system. - Takeaki Sugimura; JeoungChill Shim; Hiroyuki Kurino; Mitsumasa Koyanagi (FPT, 2003)

Design of A Novel Real-Shared Memory Module for High Performance Parallel Processor System with Shared Memory. - Zhe Liu 005; JeoungChill Shim; Hiroyuki Kurino; Mitsumasa Koyanagi (AINA (2), 2004)

Design and Evaluation of a Novel Real-Shared Cache Module for High Performance Parallel Processor Chip. - Zhe Liu 005; JeoungChill Shim; Hiroyuki Kurino; Mitsumasa Koyanagi (PDCAT, 2004)