A 1V 18GHz Clock Generator in a 65nm PD-SOI Technology. - Fadi H. Gebara; Jeremy D. Schaub; Tuyet Nguyen; Jarom Peña; Ivan Vo; David Boerstler; Kevin J. Nowka (ISSCC, 2007)

An on-chip dual supply charge pump system for 45nm PD SOI eDRAM. - Jente B. Kuang; Abraham Mathews; John Barth 001; Fadi H. Gebara; Tuyet Nguyen; Jeremy D. Schaub; Kevin J. Nowka; Gary D. Carpenter; Don Plass; Erik Nelson; Ivan Vo; William R. Reohr; et al. (ESSCIRC, 2008)

On-chip jitter and oscilloscope circuits using an asynchronous sample clock. - Jeremy D. Schaub; Fadi H. Gebara; Tuyet Nguyen; Ivan Vo; Jarom Peña; Dhruva J. Acharyya (ESSCIRC, 2008)

A 32nm 0.5V-supply dual-read 6T SRAM. - Jente B. Kuang; Jeremy D. Schaub; Fadi H. Gebara; Dieter F. Wendel; Sudesh Saroop; Tuyet Nguyen; Thomas Fröhnel; Antje Müller; Christopher M. Durham; Rolf Sautter; Bryan Lloyd; Bryan J. Robbins; et al. (CICC, 2010)

The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM. - Jente B. Kuang; Jeremy D. Schaub; Fadi H. Gebara; Dieter F. Wendel; Thomas Fröhnel; Sudesh Saroop; Sani R. Nassif; Kevin J. Nowka (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Performance impact of through-silicon vias (TSVs) in three-dimensional technology measured by SRAM ring oscillators. - Jente B. Kuang; Keith A. Jenkins; Kevin Stawiasz; Jeremy D. Schaub (ESSCIRC, 2013)