PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC. - Lucas Grativol; Lubin Gauthier; Mathieu Léonardon; Jérémy Morlier; Antoine Lavrard-Meyer; Guillaume Muller 001; Virginie Fresse; Matthieu Arzel (ISCAS, 2024)

Input Resolution Downsizing as a Compression Technique for Vision Deep Learning Systems. - Jérémy Morlier; Mathieu Léonardon; Vincent Gripon (CoRR, 2025)