A sparse VLIW instruction encoding scheme compatible with generic binaries. - Anthony Brandon; Joost Hoozemans; Jeroen van Straten; Arthur Francisco Lorenzon; Anderson Luiz Sartor; Antonio Carlos Schneider Beck; Stephan Wong (ReConFig, 2015)

Multiple contexts in a multi-ported VLIW register file implementation. - Joost Hoozemans; Jens Johansen; Jeroen van Straten; Anthony Brandon; Stephan Wong (ReConFig, 2015)

VLIW-Based FPGA Computation Fabric with Streaming Memory Hierarchy for Medical Imaging Applications. - Joost Hoozemans; Rolf Heij; Jeroen van Straten; Zaid Al-Ars (ARC, 2017)

Exploring ILP and TLP on a Polymorphic VLIW Processor. - Anthony Brandon; Joost Hoozemans; Jeroen van Straten; Stephan Wong (ARCS, 2017)

Using a polymorphic VLIW processor to improve schedulability and performance for mixed-criticality systems. - Joost Hoozemans; Jeroen van Straten; Stephan Wong (RTCSA, 2017)

Evaluating Auto-adaptation Methods for Fine-Grained Adaptable Processors. - Joost Hoozemans; Jeroen van Straten; Zaid Al-Ars; Stephan Wong (ARCS, 2018)

Increasing resource utilization in mixed-criticality systems using a polymorphic VLIW processor. - Joost Hoozemans; Jeroen van Straten; Stephan Wong (J. Syst. Archit., 2018)

Supporting Columnar In-memory Formats on FPGA: The Hardware Design of Fletcher for Apache Arrow. - Johan Peltenburg; Jeroen van Straten; Matthijs Brobbel; H. Peter Hofstee; Zaid Al-Ars (ARC, 2019)

Fletcher: A Framework to Efficiently Integrate FPGA Accelerators with Apache Arrow. - Johan Peltenburg; Jeroen van Straten; Lars Wijtemans; Lars van Leeuwen; Zaid Al-Ars; H. Peter Hofstee (FPL, 2019)

eQASM: An Executable Quantum Instruction Set Architecture. - Xiang Fu 003; Leon Riesebos; M. A. Rol; Jeroen van Straten; J. van Someren 001; Nader Khammassi; Imran Ashraf 002; R. F. L. Vermeulen; V. Newsum; K. K. L. Loh; J. C. de Sterke; W. J. Vlothuizen; et al. (HPCA, 2019)

Frame-based Programming, Stream-Based Processing for Medical Image Processing Applications. - Joost Hoozemans; Rob de Jong; Steven van der Vlugt; Jeroen van Straten; Uttam Kumar Elango; Zaid Al-Ars (J. Signal Process. Syst., 2019)

ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA. - Joost Hoozemans; Jeroen van Straten; Timo Viitanen; Aleksi Tervo; Jiri Kadlec; Zaid Al-Ars (J. Signal Process. Syst., 2019)

Tydi: An Open Specification for Complex Data Structures Over Hardware Streams. - Johan Peltenburg; Jeroen van Straten; Matthijs Brobbel; Zaid Al-Ars; H. Peter Hofstee (IEEE Micro, 2020)

Generating High-Performance FPGA Accelerator Designs for Big Data Analytics with Fletcher and Apache Arrow. - Johan Peltenburg; Jeroen van Straten; Matthijs Brobbel; Zaid Al-Ars; H. Peter Hofstee (J. Signal Process. Syst., 2021)

Tydi-lang: A Language for Typed Streaming Hardware. - Yongding Tian; Matthijs A. Reukers; Zaid Al-Ars; H. Peter Hofstee; Matthijs Brobbel; Johan Peltenburg; Jeroen van Straten (SC Workshops, 2023)

An Intermediate Representation for Composable Typed Streaming Dataflow Designs. - Matthijs A. Reukers; Yongding Tian; Zaid Al-Ars; H. Peter Hofstee; Matthijs Brobbel; Johan Peltenburg; Jeroen van Straten (VLDB Workshops, 2023)