Reinforcement Learning with Kohonen-based State Aggregation for Obstacle Avoidance of a Mobile Robot. - Jerónimo Castrillón; Jorge A. Peña (CIIC, 2005)

MAPS: an integrated framework for MPSoC application parallelization. - Jianjiang Ceng; Jerónimo Castrillón; Weihua Sheng; Hanno Scharwächter; Rainer Leupers; Gerd Ascheid; Heinrich Meyr; Tsuyoshi Isshiki; Hiroaki Kunieda (DAC, 2008)

A high-level virtual platform for early MPSoC software development. - Jianjiang Ceng; Weihua Sheng; Jerónimo Castrillón; Anastasia Stulova; Rainer Leupers; Gerd Ascheid; Heinrich Meyr (CODES+ISSS, 2009)

Task management in MPSoCs: An ASIP approach. - Jerónimo Castrillón; Diandian Zhang; Torsten Kempf; Bart Vanthournout; Rainer Leupers; Gerd Ascheid (ICCAD, 2009)

Software Compilation Techniques for MPSoCs. - Rainer Leupers; Weihua Sheng; Jerónimo Castrillón (Handbook of Signal Processing Systems, 2010)

MPSoC programming using the MAPS compiler. - Rainer Leupers; Jerónimo Castrillón (ASP-DAC, 2010)

Trace-based KPN composability analysis for mapping simultaneous applications to MPSoC platforms. - Jerónimo Castrillón; Ricardo Velasquez; Anastasia Stulova; Weihua Sheng; Jianjiang Ceng; Rainer Leupers; Gerd Ascheid; Heinrich Meyr (DATE, 2010)

Optimized communication architecture of MPSoCs with a hardware scheduler: A system view. - Diandian Zhang; Han Zhang; Jerónimo Castrillón; Torsten Kempf; Gerd Ascheid; Rainer Leupers; Bart Vanthournout (SoC, 2010)

Trends in embedded software synthesis. - Jerónimo Castrillón; Weihua Sheng; Rainer Leupers (ICSAMOS, 2011)

Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis. - Diandian Zhang; Han Zhang; Jerónimo Castrillón; Torsten Kempf; Bart Vanthournout; Gerd Ascheid; Rainer Leupers (Int. J. Embed. Real Time Commun. Syst., 2011)

Communication-aware mapping of KPN applications onto heterogeneous MPSoCs. - Jerónimo Castrillón; Andreas Tretter; Rainer Leupers; Gerd Ascheid (DAC, 2012)

Application-aware spinlock control using a hardware scheduler in MPSoC platforms. - Diandian Zhang; Li Lu 005; Jerónimo Castrillón; Torsten Kempf; Gerd Ascheid; Rainer Leupers; Bart Vanthournout (ISSoC, 2012)

Split-cost communication model for improved MPSoC application mapping. - Maximilian Odendahl; Jerónimo Castrillón; Vitaliy Volevach; Rainer Leupers; Gerd Ascheid (ISSoC, 2013)

Efficient Implementation of Application-Aware Spinlock Control in MPSoCs. - Diandian Zhang; Li Lu 005; Jerónimo Castrillón; Torsten Kempf; Gerd Ascheid; Rainer Leupers; Bart Vanthournout (Int. J. Embed. Real Time Commun. Syst., 2013)

MAPS: Mapping Concurrent Dataflow Applications to Heterogeneous MPSoCs. - Jerónimo Castrillón; Rainer Leupers; Gerd Ascheid (IEEE Trans. Ind. Informatics, 2013)

Programming heterogeneous MPSoCs: tool flows to close the software productivity gap. - Jerónimo Castrillón Mazo (Springer, 2013)

Software Compilation Techniques for MPSoCs. - Rainer Leupers; Weihua Sheng; Jerónimo Castrillón (Handbook of Signal Processing Systems, 2013)

Automatic detection of concurrency bugs through event ordering constraints. - Luis Gabriel Murillo; Simon Wawroschek; Jerónimo Castrillón; Rainer Leupers; Gerd Ascheid (DATE, 2014)

Multi/many-core programming: where are we standing? - Jerónimo Castrillón; Lothar Thiele; Lars Schor; Weihua Sheng; Ben H. H. Juurlink; Mauricio Alvarez-Mesa; Angela Pohl; Ralph Jessenberger; Victor Reyes; Rainer Leupers (DATE, 2015)

Analysis of Process Traces for Mapping Dynamic KPN Applications to MPSoCs. - Andrés Goens; Jerónimo Castrillón (IESS, 2015)

Compiling for Resilience: the Performance Gap. - Norman A. Rink; Dmitrii Kuvaiskii; Jerónimo Castrillón; Christof Fetzer (PARCO, 2015)

ViPES 2015 - Preface. - Diana Göhringer; Michael Hübner 001; Jerónimo Castrillón; Cristina Silvano (SAMOS, 2015)

Efficient Data Structures for Dynamic Graph Analysis. - Benjamin Schiller; Jerónimo Castrillón; Thorsten Strufe (SITIS, 2015)

GCC-Plugin for Automated Accelerator Generation and Integration on Hybrid FPGA-SoCs. - Markus Vogt; Gerald Hempel; Jerónimo Castrillón; Christian Hochberger (CoRR, 2015)

Fault tolerance with aspects: a feasibility study. - Sven Karol; Norman A. Rink; Bálint Gyapjas; Jerónimo Castrillón (MODULARITY, 2016)

Why Comparing System-Level MPSoC Mapping Approaches is Difficult: A Case Study. - Andres Goens; Robert Khasanov; Jerónimo Castrillón; Simon Polstra; Andy D. Pimentel (MCSoC, 2016)

High-level NoC model for MPSoC compilers. - Christian Menard; Andres Goens; Jerónimo Castrillón (NORCAS, 2016)

Compile- and run-time approaches for the selection of efficient data structures for dynamic graph analysis. - Benjamin Schiller; Clemens Deusser; Jerónimo Castrillón; Thorsten Strufe (Appl. Netw. Sci., 2016)

An optimal allocation of memory buffers for complex multicore platforms. - Andres Goens; Jerónimo Castrillón; Maximilian Odendahl; Rainer Leupers (J. Syst. Archit., 2016)

Guest Editorial: Special Issue on Virtual Prototyping of Parallel and Embedded Systems (ViPES). - Jerónimo Castrillón Mazo; Cristina Silvano (ACM Trans. Embed. Comput. Syst., 2016)

Extending a Compiler Backend for Complete Memory Error Detection. - Norman A. Rink; Jerónimo Castrillón (Automotive - Safety & Security, 2017)

Multi-grained performance estimation for MPSoC compilers: work-in-progress. - Miguel Angel Aguilar; Abhishek Aggarwal; Awaid Shaheen; Rainer Leupers; Gerd Ascheid; Jerónimo Castrillón; Liam Fitzpatrick (CASES, 2017)

Trading Fault Tolerance for Performance in AN Encoding. - Norman A. Rink; Jerónimo Castrillón (Conf. Computing Frontiers, 2017)

Rethinking on-chip DRAM cache for simultaneous performance and energy optimization. - Fazal Hameed; Jerónimo Castrillón (DATE, 2017)

Towards compositional and generative tensor optimizations. - Adilla Susungi; Norman A. Rink; Jerónimo Castrillón; Immo Huismann; Albert Cohen 001; Claude Tadonki; Jörg Stiller; Jochen Fröhlich (GPCE, 2017)

Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY): Preface. - Johanna Sepúlveda; Vania Marangozova-Martin; Jerónimo Castrillón (ICCS, 2017)

Application interference analysis: Towards energy-efficient workload management on heterogeneous micro-server architectures. - Markus Hähnel; Frehiwot Melak Arega; Waltenegus Dargie; Robert Khasanov; Jerónimo Castrillón (INFOCOM Workshops, 2017)

Efficient STT-RAM last-level-cache architecture to replace DRAM cache. - Fazal Hameed; Christian Menard; Jerónimo Castrillón (MEMSYS, 2017)

Analyzing State-of-the-Art Role-based Programming Languages. - Lars Schütze; Jerónimo Castrillón (Programming, 2017)

System simulation with gem5 and SystemC: The keystone for full interoperability. - Christian Menard; Jerónimo Castrillón; Matthias Jung 001; Norbert Wehn (SAMOS, 2017)

TETRiS: a Multi-Application Run-Time System for Predictable Execution of Static Mappings. - Andrés Goens; Robert Khasanov; Jerónimo Castrillón; Marcus Hähnel; Till Smejkal; Hermann Härtig (SCOPES, 2017)

Robust Mapping of Process Networks to Many-Core Systems using Bio-Inspired Design Centering. - Gerald Hempel; Andrés Goens; Jerónimo Castrillón; Josefine Asmus; Ivo F. Sbalzarini (SCOPES, 2017)

Wildly Heterogeneous Post-CMOS Technologies Meet Software (Dagstuhl Seminar 17061). - Jerónimo Castrillón Mazo; Tei-Wei Kuo; Heike E. Riel; Matthias Lieber (Dagstuhl Reports, 2017)

Symmetry in Software Synthesis. - Andrés Goens; Sergio Siccha; Jerónimo Castrillón (ACM Trans. Archit. Code Optim., 2017)

MAPS: A Software Development Environment for Embedded Multicore Applications. - Rainer Leupers; Miguel Angel Aguilar; Juan Fernando Eusse; Jerónimo Castrillón; Weihua Sheng (Handbook of Hardware/Software Codesign, 2017)

Compiling for concise code and efficient I/O. - Sebastian Ertel; Andrés Goens; Justus Adam; Jerónimo Castrillón (CC, 2018)

CFDlang: High-level code generation for high-order methods in fluid dynamics. - Norman A. Rink; Adilla Susungi; Jerónimo Castrillón; Jörg Stiller; Claude Tadonki (RWDSL@CGO, 2018)

Meta-programming for cross-domain tensor optimizations. - Adilla Susungi; Norman A. Rink; Albert Cohen 001; Jerónimo Castrillón; Claude Tadonki (GPCE, 2018)

Implicit Data-Parallelism in Kahn Process Networks: Bridging the MacQueen Gap. - Robert Khasanov; Andrés Goens; Jerónimo Castrillón (PARMA-DITAM@HiPEAC, 2018)

On the Representation of Mappings to Multicores. - Andres Goens; Christian Menard; Jerónimo Castrillón (MCSoC, 2018)

Supporting Fine-grained Dataflow Parallelism in Big Data Systems. - Sebastian Ertel; Justus Adam; Jerónimo Castrillón (PMAM@PPoPP, 2018)

NVMain Extension for Multi-Level Cache Systems. - Asif Ali Khan; Fazal Hameed; Jerónimo Castrillón (RAPIDO, 2018)

A Hardware/Software Stack for Heterogeneous Systems. - Jerónimo Castrillón; Matthias Lieber; Sascha Klüppelholz; Marcus Völp; Nils Asmussen; Uwe Aßmann; Franz Baader; Christel Baier; Gerhard P. Fettweis; Jochen Fröhlich; Andrés Goens; Sebastian Haas; et al. (IEEE Trans. Multi Scale Comput. Syst., 2018)

A Domain-Specific Language and Editor for Parallel Particle Methods. - Sven Karol; Tobias Nett; Jerónimo Castrillón; Ivo F. Sbalzarini (ACM Trans. Math. Softw., 2018)

Performance and Energy-Efficient Design of STT-RAM Last-Level Cache. - Fazal Hameed; Asif Ali Khan; Jerónimo Castrillón (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Reactors: A Deterministic Model for Composable Reactive Systems. - Marten Lohstroh; Íñigo Íncer Romeo; Andrés Goens; Patricia Derler; Jerónimo Castrillón; Edward A. Lee; Alberto L. Sangiovanni-Vincentelli (CyPhy/WESE, 2019)

RecordFlux: Formal Message Specification and Generation of Verifiable Binary Parsers. - Tobias Reiher; Alexander Senier; Jerónimo Castrillón; Thorsten Strufe (FACS, 2019)

STCLang: state thread composition as a foundation for monadic dataflow parallelism. - Sebastian Ertel; Justus Adam; Norman A. Rink; Andrés Goens; Jerónimo Castrillón (Haskell@ICFP, 2019)

SHRIMP: Efficient Instruction Delivery with Domain Wall Memory. - Joonas Multanen; Pekka Jääskeläinen; Asif Ali Khan; Fazal Hameed; Jerónimo Castrillón (ISLPED, 2019)

Optimizing tensor contractions for embedded devices with racetrack memory scratch-pads. - Asif Ali Khan; Norman A. Rink; Fazal Hameed; Jerónimo Castrillón (LCTES, 2019)

A case study on machine learning for synthesizing benchmarks. - Andrés Goens; Alexander Brauckmann; Sebastian Ertel; Chris Cummins; Hugh Leather; Jerónimo Castrillón (MAPL@PLDI, 2019)

TeIL: a type-safe imperative tensor intermediate language. - Norman A. Rink; Jerónimo Castrillón (ARRAY@PLDI, 2019)

On Compact Mappings for Multicore Systems. - Andrés Goens; Christian Menard; Jerónimo Castrillón (SAMOS, 2019)

Efficient late binding of dynamic function compositions. - Lars Schütze; Jerónimo Castrillón (SLE, 2019)

RTSim: A Cycle-Accurate Simulator for Racetrack Memories. - Asif Ali Khan; Fazal Hameed; Robin Bläsing; Stuart S. P. Parkin; Jerónimo Castrillón (IEEE Comput. Archit. Lett., 2019)

Category-Theoretic Foundations of "STCLang: State Thread Composition as a Foundation for Monadic Dataflow Parallelism". - Sebastian Ertel; Justus Adam; Norman A. Rink; Andrés Goens; Jerónimo Castrillón (CoRR, 2019)

Architecture and Advanced Electronics Pathways Toward Highly Adaptive Energy- Efficient Computing. - Gerhard P. Fettweis; Meik Dorpinghaus; Jerónimo Castrillón; Akash Kumar 001; Christel Baier; Karlheinz Bock; Frank Ellinger; Andreas Fery; Frank H. P. Fitzek; Hermann Härtig; Kambiz Jamshidi; Thomas Kissinger; et al. (Proc. IEEE, 2019)

A Novel Hybrid DRAM/STT-RAM Last-Level-Cache Architecture for Performance, Energy, and Endurance Enhancement. - Fazal Hameed; Jerónimo Castrillón (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Compiler-based graph representations for deep learning models of code. - Alexander Brauckmann; Andrés Goens; Sebastian Ertel; Jerónimo Castrillón (CC, 2020)

Generalized Data Placement Strategies for Racetrack Memories. - Asif Ali Khan; Andrés Goens; Fazal Hameed; Jerónimo Castrillón (DATE, 2020)

Energy-efficient Runtime Resource Management for Adaptable Multi-application Mapping. - Robert Khasanov; Jerónimo Castrillón (DATE, 2020)

Achieving Determinism in Adaptive AUTOSAR. - Christian Menard; Andrés Goens; Marten Lohstroh; Jerónimo Castrillón (DATE, 2020)

ComPy-Learn: A toolbox for exploring machine learning representations for compilers. - Alexander Brauckmann; Andrés Goens; Jerónimo Castrillón (FDL, 2020)

A Language for Deterministic Coordination Across Multiple Timelines. - Marten Lohstroh; Christian Menard; Alexander Schulz-Rosengarten; Matthew Weber; Jerónimo Castrillón; Edward A. Lee (FDL, 2020)

Modem Design in the Era of 5G and Beyond: The Need for a Formal Approach. - Robert Wittig; Andrés Goens; Christian Menard; Emil Matús; Gerhard P. Fettweis; Jerónimo Castrillón (ICT, 2020)

Efficient dispatch of multi-object polymorphic call sites in contextual role-oriented programming languages. - Lars Schütze; Jerónimo Castrillón (MPLR, 2020)

The gem5 Simulator: Version 20.0+. - Jason Lowe-Power; Abdul Mutaal Ahmad; Ayaz Akram; Mohammad Alian; Rico Amslinger; Matteo Andreozzi; Adrià Armejach; Nils Asmussen; Srikant Bharadwaj; Gabe Black; Gedare Bloom; Bobby R. Bruce; et al. (CoRR, 2020)

Magnetic Racetrack Memory: From Physics to the Cusp of Applications Within a Decade. - Robin Bläsing; Asif Ali Khan; Panagiotis Ch. Filippou; Chirag Garg; Fazal Hameed; Jerónimo Castrillón; Stuart S. P. Parkin (Proc. IEEE, 2020)

ShiftsReduce: Minimizing Shifts in Racetrack Memory 4.0. - Asif Ali Khan; Fazal Hameed; Robin Bläsing; Stuart S. P. Parkin; Jerónimo Castrillón (ACM Trans. Archit. Code Optim., 2020)

Polyhedral Compilation for Racetrack Memories. - Asif Ali Khan; Hauke Mewes; Tobias Grosser; Torsten Hoefler; Jerónimo Castrillón (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Optimizing Tensor Contractions for Embedded Devices with Racetrack and DRAM Memories. - Asif Ali Khan; Norman A. Rink; Fazal Hameed; Jerónimo Castrillón (ACM Trans. Embed. Comput. Syst., 2020)

PolyGym: Polyhedral Optimizations as an Environment for Reinforcement Learning. - Alexander Brauckmann; Andrés Goens; Jerónimo Castrillón (PACT, 2021)

An online guided tuning approach to run CNN pipelines on edge devices. - Pirah Noor Soomro; Mustafa Abduljabbar; Jerónimo Castrillón; Miquel Pericàs (CF, 2021)

From Domain-Specific Languages to Memory-Optimized Accelerators for Fluid Dynamics. - Karl F. A. Friebel; Stephanie Soldavini; Gerald Hempel; Christian Pilato; Jerónimo Castrillón (CLUSTER, 2021)

BLOwing Trees to the Ground: Layout Optimization of Decision Trees on Racetrack Memory. - Christian Hakert; Asif Ali Khan; Kuan-Hsun Chen; Fazal Hameed; Jerónimo Castrillón; Jian-Jia Chen (DAC, 2021)

EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. - Christian Pilato; Stanislav Böhm; Fabien Brocheton; Jerónimo Castrillón; Riccardo Cevasco; Vojtech Cima; Radim Cmar; Dionysios Diamantopoulos; Fabrizio Ferrandi; Jan Martinovic; Gianluca Palermo; Michele Paolino; et al. (DATE, 2021)

Towards Adaptive Multi-Alternative Process Network. - Hasna Bouraoui; Chadlia Jerad; Jerónimo Castrillón (PARMA-DITAM@HiPEAC, 2021)

Mocasin - Rapid Prototyping of Rapid Prototyping Tools: A Framework for Exploring New Approaches in Mapping Software to Heterogeneous Multi-cores. - Christian Menard; Andrés Goens; Gerald Hempel; Robert Khasanov; Julian Robledo; Felix Teweleitt; Jerónimo Castrillón (DroneSE/RAPIDO@HiPEAC, 2021)

The OpenPME Problem Solving Environment for Numerical Simulations. - Nesrine Khouzami; Lars Schütze; Pietro Incardona; Landfried Kraatz; Tina Subic; Jerónimo Castrillón; Ivo F. Sbalzarini (ICCS (1), 2021)

Embeddings of Task Mappings to Multicore Systems. - Andrés Goens; Jerónimo Castrillón (SAMOS, 2021)

A Reinforcement Learning Environment for Polyhedral Optimizations. - Alexander Brauckmann; Andrés Goens; Jerónimo Castrillón (CoRR, 2021)

Improving the Performance of Block-based DRAM Caches Via Tag-Data Decoupling. - Fazal Hameed; Asif Ali Khan; Jerónimo Castrillón (IEEE Trans. Computers, 2021)

Domain-specific Hybrid Mapping for Energy-efficient Baseband Processing in Wireless Networks. - Robert Khasanov; Julian Robledo; Christian Menard; Andrés Goens; Jerónimo Castrillón (ACM Trans. Embed. Comput. Syst., 2021)

STAMP-Rust: Language and Performance Comparison to C on Transactional Benchmarks. - Felix Suchert; Jerónimo Castrillón (Bench, 2022)

Guard the Cache: Dispatch Optimization in a Contextual Role-oriented Language. - Lars Schütze; Cornelius Kummer; Jerónimo Castrillón (COP@ECOOP, 2022)

HyCSim: A rapid design space exploration tool for emerging hybrid last-level caches. - Carlos Escuin; Asif Ali Khan; Pablo Ibáñez 001; Teresa Monreal; Víctor Viñals; Jerónimo Castrillón (DroneSE/RAPIDO@HiPEAC, 2022)

Parameterizable mobile workloads for adaptable base station optimizations. - Julian Robledo; Jerónimo Castrillón (MCSoC, 2022)

Shisha: Online Scheduling of CNN Pipelines on Heterogeneous Architectures. - Pirah Noor Soomro; Mustafa Abduljabbar; Jerónimo Castrillón; Miquel Pericàs (PPAM (1), 2022)

DNA Pre-Alignment Filter Using Processing Near Racetrack Memory. - Fazal Hameed; Asif Ali Khan; Sébastien Ollivier; Alex K. Jones; Jerónimo Castrillón (IEEE Comput. Archit. Lett., 2022)

mAPN: Modeling, Analysis, and Exploration of Algorithmic and Parallelism Adaptivity. - Hasna Bouraoui; Chadlia Jerad; Omar Romdhani; Jerónimo Castrillón (CoRR, 2022)

Model-based autotuning of discretization methods in numerical simulations of partial differential equations. - Nesrine Khouzami; Friedrich Michel; Pietro Incardona; Jerónimo Castrillón; Ivo F. Sbalzarini (J. Comput. Sci., 2022)

Energy-Efficient Instruction Delivery in Embedded Systems With Domain Wall Memory. - Joonas Multanen; Kari Hepola; Asif Ali Khan; Jerónimo Castrillón; Pekka Jääskeläinen (IEEE Trans. Computers, 2022)

mpsym: Improving Design-Space Exploration of Clustered Manycores With Arbitrary Topologies. - Andres Goens; Timo Nicolai; Jerónimo Castrillón (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

BlendCache: An Energy and Area Efficient Racetrack Last-Level-Cache Architecture. - Fazal Hameed; Jerónimo Castrillón (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory. - Adam Siemieniuk; Lorenzo Chelini; Asif Ali Khan; Jerónimo Castrillón; Andi Drebes; Henk Corporaal; Tobias Grosser; Martin Kong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

ALPHA: A Novel Algorithm-Hardware Co-Design for Accelerating DNA Seed Location Filtering. - Fazal Hameed; Asif Ali Khan; Jerónimo Castrillón (IEEE Trans. Emerg. Top. Comput., 2022)

Brain-inspired Cognition in Next-generation Racetrack Memories. - Asif Ali Khan; Sébastien Ollivier; Stephen Longofono; Gerald Hempel; Jerónimo Castrillón; Alex K. Jones (ACM Trans. Embed. Comput. Syst., 2022)

Special Session - Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications. - Jörg Henkel; Lokesh Siddhu; Lars Bauer; Jürgen Teich; Stefan Wildermann; Mehdi B. Tahoori; Mahta Mayahinia; Jerónimo Castrillón; Asif Ali Khan; Hamid Farzaneh; João Paulo C. de Lima; Jian-Jia Chen; et al. (CASES, 2023)

Towards Virtual Machine Support for Contextual Role-Oriented Programming Languages. - Lars Schütze; Jerónimo Castrillón (COP@ECOOP, 2023)

Pruning and Early-Exit Co-Optimization for CNN Acceleration on FPGAs. - Guilherme Korol; Michael Guilherme Jordan; Mateus Beck Rutzig; Jerónimo Castrillón; Antonio Carlos Schneider Beck (DATE, 2023)

ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs. - Felix Suchert; Lisza Zeidler; Jerónimo Castrillón; Sebastian Ertel (ECOOP, 2023)

base2: An IR for Binary Numeral Types. - Karl F. A. Friebel; Jiahong Bi; Jerónimo Castrillón (HEART, 2023)

Compression-Aware and Performance-Efficient Insertion Policies for Long-Lasting Hybrid LLCs. - Carlos Escuin; Asif Ali Khan; Pablo Ibáñez 001; Teresa Monreal; Jerónimo Castrillón; Víctor Viñals (HPCA, 2023)

Design Space Exploration for CNN Offloading to FPGAs at the Edge. - Guilherme Korol; Michael Guilherme Jordan; Mateus Beck Rutzig; Jerónimo Castrillón; Antonio Carlos Schneider Beck (ISVLSI, 2023)

Provable Determinism for Software in Cyber-Physical Systems. - Marcus Rossel; Shaokai Lin; Marten Lohstroh; Jerónimo Castrillón; Andrés Goens (VSTTE, 2023)

CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms. - Asif Ali Khan; Hamid Farzaneh; Karl F. A. Friebel; Lorenzo Chelini; Jerónimo Castrillón (CoRR, 2023)

HElium: A Language and Compiler for Fully Homomorphic Encryption with Support for Proxy Re-Encryption. - Mirko Günther; Lars Schütze; Kilian Becher; Thorsten Strufe; Jerónimo Castrillón (CoRR, 2023)

ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs (Artifact). - Felix Suchert; Lisza Zeidler; Jerónimo Castrillón; Sebastian Ertel (Dagstuhl Artifacts Ser., 2023)

ROLLED: Racetrack Memory Optimized Linear Layout and Efficient Decomposition of Decision Trees. - Christian Hakert; Asif Ali Khan; Kuan-Hsun Chen; Fazal Hameed; Jerónimo Castrillón; Jian-Jia Chen (IEEE Trans. Computers, 2023)

Automatic Creation of High-bandwidth Memory Architectures from Domain-specific Languages: The Case of Computational Fluid Dynamics. - Stephanie Soldavini; Karl F. A. Friebel; Mattia Tibaldi; Gerald Hempel; Jerónimo Castrillón; Christian Pilato (ACM Trans. Reconfigurable Technol. Syst., 2023)

DownShift: Tuning Shift Reduction With Reliability for Racetrack Memories. - Asif Ali Khan; Sébastien Ollivier; Fazal Hameed; Jerónimo Castrillón; Alex K. Jones (IEEE Trans. Computers, 2023)

High-performance Deterministic Concurrency Using Lingua Franca. - Christian Menard; Marten Lohstroh; Soroush Bateni; Matthew Chorlian; Arthur Deng; Peter Donovan; Clément Fournier; Shaokai Lin; Felix Suchert; Tassilo Tanneberger; Hokeun Kim; Jerónimo Castrillón; et al. (ACM Trans. Archit. Code Optim., 2023)

Flexible Spatio-Temporal Energy-Efficient Runtime Management. - Robert Khasanov; Marc Dietrich; Jerónimo Castrillón (ASPDAC, 2024)

C4CAM: A Compiler for CAM-based In-memory Accelerators. - Hamid Farzaneh; João Paulo Cardoso de Lima; Mengyuan Li 001; Asif Ali Khan; Xiaobo Sharon Hu; Jerónimo Castrillón (ASPLOS (3), 2024)

CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms. - Asif Ali Khan; Hamid Farzaneh; Karl Friedrich Alexander Friebel; Clément Fournier; Lorenzo Chelini; Jerónimo Castrillón (ASPLOS (4), 2024)

MYRTUS: Multi-layer 360° dYnamic orchestration and interopeRable design environmenT for compute-continUum Systems. - Francesca Palumbo; Maria Katiuscia Zedda; Tiziana Fanni; Alessandra Bagnato; Luca Castello; Jerónimo Castrillón; Roberto Del Ponte; Yansha Deng; Bart Driessen; Mauro Fadda; Tristan Halna du Fretay; Julio de Oliveira Filho; et al. (CF (Companion), 2024)

Leveraging the MLIR Infrastructure for the Computing Continuum. - Jiahong Bi; Guilherme Korol; Jerónimo Castrillón (CPS Summer School, PhD Workshop, 2024)

SHERLOCK: Scheduling Efficient and Reliable Bulk Bitwise Operations in NVMs. - Hamid Farzaneh; João Paulo C. de Lima; Ali Nezhadi Khelejani; Asif Ali Khan; Mahta Mayahinia; Mehdi B. Tahoori; Jerónimo Castrillón (DAC, 2024)

Full-Stack Optimization for CAM-Only DNN Inference. - João Paulo C. de Lima; Asif Ali Khan; Luigi Carro; Jerónimo Castrillón (DATE, 2024)

Smoothing Disruption Across the Stack: Tales of Memory, Heterogeneity, & Compilers. - Michael T. Niemier; Zephan M. Enciso; M. Sharifi; Xiaobo Sharon Hu; Ian O'Connor; A. Graening; R. Sharma; P. Gupta; Jerónimo Castrillón; João Paulo C. de Lima; Asif Ali Khan; Hamid Farzaneh; et al. (DATE, 2024)

A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach. - Christian Pilato; Subhadeep Banik; Jakub Beránek; Fabien Brocheton; Jerónimo Castrillón; Riccardo Cevasco; Radim Cmar; Serena Curzel; Fabrizio Ferrandi; Karl F. A. Friebel; Antonella Galizia; Matteo Grasso; et al. (DATE, 2024)

Etna: MLIR-Based System-Level Design and Optimization for Transparent Application Execution on CPU-FPGA Nodes. - Stephanie Soldavini; Felix Suchert; Serena Curzel; Michele Fiorito; Karl F. A. Friebel; Fabrizio Ferrandi; Radim Cmar; Jerónimo Castrillón; Christian Pilato (FCCM, 2024)

Timing enclaves for performance in Lingua Franca. - Julian Robledo; Christian Menard; Erling Rennemo Jellum; Edward A. Lee; Jerónimo Castrillón (FDL, 2024)

Efficient Memory Layout for Pre-Alignment Filtering of Long DNA Reads Using Racetrack Memory. - Asif Ali Khan; Fazal Hameed; Taha Shahroodi; Alex K. Jones; Jerónimo Castrillón (IEEE Comput. Archit. Lett., 2024)

The Landscape of Compute-near-memory and Compute-in-memory: A Research and Commercial Overview. - Asif Ali Khan; João Paulo C. de Lima; Hamid Farzaneh; Jerónimo Castrillón (CoRR, 2024)

PretVM: Predictable, Efficient Virtual Machine for Real-Time Concurrency. - Shaokai Lin; Erling Rennemo Jellum; Mirco Theile; Tassilo Tanneberger; Binqi Sun; Chadlia Jerad; Ruomu Xu; Guangyu Feng; Christian Menard; Marten Lohstroh; Jerónimo Castrillón; Sanjit Seshia; et al. (CoRR, 2024)

E-Mapper: Energy-Efficient Resource Allocation for Traditional Operating Systems on Heterogeneous Processors. - Till Smejkal; Robert Khasanov; Jerónimo Castrillón; Hermann Härtig (CoRR, 2024)

Count2Multiply: Reliable In-memory High-Radix Counting. - João Paulo Cardoso de Lima; Benjamin F. Morris III; Asif Ali Khan; Jerónimo Castrillón; Alex K. Jones (CoRR, 2024)

Deterministic Coordination across Multiple Timelines. - Marten Lohstroh; Soroush Bateni; Christian Menard; Alexander Schulz-Rosengarten; Jerónimo Castrillón; Edward A. Lee (ACM Trans. Embed. Comput. Syst., 2024)

DFA-Net: A Compiler-Specific Neural Architecture for Robust Generalization in Data Flow Analyses. - Alexander Brauckmann; Anderson Faustino da Silva; Gabriel Synnaeve; Michael F. P. O'Boyle; Jerónimo Castrillón; Hugh Leather (CC, 2025)

A Comparative Study on the Accuracy and the Speed of Static and Dynamic Program Classifiers. - Anderson Faustino da Silva; Jerónimo Castrillón; Fernando Magno Quintão Pereira (CC, 2025)

Multi-Partner Project: Key Enabling Technologies for Cognitive Computing Continuum - MYRTUS Project Perspective. - Francesca Palumbo; Francesco Ratto; Claudio Rubattu; Maria Katiuscia Zedda; Tiziana Fanni; Veena Rao; Bart Driessen; Jerónimo Castrillón (DATE, 2025)

TQHD: Thermometer Encoding Based Quantization for Hyperdimensional Computing. - Caio Vieira; Jerónimo Castrillón; Antonio Carlos Schneider Beck (ISVLSI, 2025)

Modeling and Simulating Emerging Memory Technologies: A Tutorial. - Yun-Chih Chen; Tristan Taylan Seidl; Nils Hölscher; Christian Hakert; Minh Duy Truong; Jian-Jia Chen; João Paulo C. de Lima; Asif Ali Khan; Jerónimo Castrillón; Ali Nezhadi; Lokesh Siddhu; Hassan Nassar; et al. (CoRR, 2025)

All-in-Memory Stochastic Computing using ReRAM. - João Paulo C. de Lima; Mehran Shoushtari Moghadam; Sercan Aygun; Jerónimo Castrillón; M. Hassan Najafi; Asif Ali Khan (CoRR, 2025)

Navigating Time and Energy Tradeoffs in Reactive Heterogeneous Systems. - Shaokai Lin; Tassilo Tanneberger; Jiahong Bi; Guangyu Feng; Yimo Xu; Julian Robledo; Robert Khasanov; Jerónimo Castrillón (IEEE Embed. Syst. Lett., 2025)

Leveraging Stochastic Depth Training for Adaptive Inference. - Guilherme Korol; Antonio Carlos Schneider Beck; Jerónimo Castrillón (CoRR, 2025)

CoMoNM: A Cost Modeling Framework for Compute-Near-Memory Systems. - Hamid Farzaneh; Asif Ali Khan; Jerónimo Castrillón (CoRR, 2025)