A 0.8-1.2GHz Single-Phase Resonant-Clocked FIR Filter with Level-Sensitive Latches. - Visvesh S. Sathe 001; Jerry C. Kao; Marios C. Papaefthymiou (CICC, 2007)

Resonant-Clock Latch-Based Design. - Visvesh S. Sathe 001; Jerry C. Kao; Marios C. Papaefthymiou (IEEE J. Solid State Circuits, 2008)

A resonant-clock 200MHz ARM926EJ-STM microcontroller. - Alexander T. Ishii; Jerry C. Kao; Visvesh S. Sathe 001; Marios C. Papaefthymiou (ESSCIRC, 2009)

A charge-recovery 600MHz FIR filter with 1.5-cycle latency overhead. - Jerry C. Kao; Wei-Hsiang Ma; Visvesh S. Sathe 001; Marios C. Papaefthymiou (ESSCIRC, 2009)

187 MHz Subthreshold-Supply Charge-Recovery FIR. - Wei-Hsiang Ma; Jerry C. Kao; Visvesh S. Sathe 001; Marios C. Papaefthymiou (IEEE J. Solid State Circuits, 2010)

A 5.5GS/s 28mW 5-bit flash ADC with resonant clock distribution. - Wei-Hsiang Ma; Jerry C. Kao; Marios C. Papaefthymiou (ESSCIRC, 2011)

Energy-Efficient Low-Latency 600 MHz FIR With High-Overdrive Charge-Recovery Logic. - Jerry C. Kao; Wei-Hsiang Ma; Visvesh S. Sathe 001; Marios C. Papaefthymiou (IEEE Trans. Very Large Scale Integr. Syst., 2012)