Efficient timing verification via mixed-mode technique. - Jerzy J. Dabrowski (Microprocess. Microprogramming, 1992)

Functional-level analog macromodeling with piecewise linear signals. - Jerzy J. Dabrowski (EURO-DAC, 1995)

Experiences with Modeling of Analog and Mixed A/D Systems Based on PWL Technique. - Jerzy J. Dabrowski; Andrzej Pulka (DATE, 1999)

Efficient interconnect timing analysis via piecewise linear technique. - Jerzy J. Dabrowski (ISCAS, 2000)

Efficient post-layout timing verification via RLC trees and explicit PWL timing integration. - Jerzy J. Dabrowski (ICECS, 2002)

BiST Model for IC RF-Transceiver Front-End. - Jerzy J. Dabrowski (DFT, 2003)

Lookback BiST for RF front-ends in digital transceivers. - Jerzy J. Dabrowski (SoC, 2003)

Mixed Loopback BiST for RF Digital Transceivers. - Jerzy J. Dabrowski; Javier Gonzalez Bayon (DFT, 2004)

Fault modeling of RF blocks based on noise analysis. - Jerzy J. Dabrowski (ISCAS (1), 2004)

Techniques for sensitizing RF path under SER test. - Jerzy J. Dabrowski; Javier Gonzalez Bayon (ISCAS (5), 2005)

A 2.4-GHz RF sampling receiver front-end in 0.18-μm CMOS. - Darius Jakonis; Kalle Folkesson; Jerzy J. Dabrowski; Patrik Eriksson; Christer Svensson (IEEE J. Solid State Circuits, 2005)

SC filter for RF down conversion with wideband image rejection. - Stefan Back Andersson; Jerzy J. Dabrowski; Christer Svensson; J. Konopacki (ISCAS, 2006)

LNA design for on-chip RF test. - Rashad Ramzan; Lei Zou; Jerzy J. Dabrowski (ISCAS, 2006)

Interactive presentation: Boosting SER test for RF transceivers by simple DSP technique. - Jerzy J. Dabrowski; Rashad Ramzan (DATE, 2007)

Multiband direct RF-sampling receiver front-end for WLAN in 0.13 μm CMOS. - Stefan Back Andersson; Rashad Ramzan; Jerzy J. Dabrowski; Christer Svensson (ECCTD, 2007)

A 1.4V 25mW Inductorless Wideband LNA in 0.13μm CMOS. - Rashad Ramzan; Stefan Back Andersson; Jerzy J. Dabrowski; Christer Svensson (ISSCC, 2007)

On-chip stimuli generation for ADC dynamic test by ΣΔ technique. - Shakeel Ahmad; Jerzy J. Dabrowski (ECCTD, 2009)

Two-tone PLL for on-chip IP3 test. - Shakeel Ahmad; Kaveh Azizi; Iman Esmaeil Zadeh; Jerzy J. Dabrowski (ISCAS, 2010)

On-Chip Stimulus Generator for Gain, Linearity, and Blocking Profile Test of Wideband RF Front Ends. - Rashad Ramzan; N. Ahsan; Jerzy J. Dabrowski (IEEE Trans. Instrum. Meas., 2010)

Built-in Loopback Test for IC RF Transceivers. - Jerzy J. Dabrowski; Rashad Ramzan (IEEE Trans. Very Large Scale Integr. Syst., 2010)

On-chip spectral test for high-speed ADCs by ΣΔ technique. - Shakeel Ahmad; Jerzy J. Dabrowski (ECCTD, 2011)

Low noise transconductance amplifier design for continuous-time ΣΔ wideband frontend. - Quoc-Tai Duong; Jerzy J. Dabrowski (ECCTD, 2011)

Wideband RF detector design for high performance on-chip test. - Quoc-Tai Duong; Jerzy J. Dabrowski (NORCHIP, 2012)

Focused calibration for advanced RF test with embedded RF detectors. - Quoc-Tai Duong; Jerzy J. Dabrowski (ECCTD, 2013)

Blocker and image reject low-IF frontend. - Fahad Qazi; Quoc-Tai Duong; Jerzy J. Dabrowski (ECCTD, 2013)

Highly linear open-loop output driver design for high speed capacitive DACs. - Quoc-Tai Duong; Jerzy J. Dabrowski; Atila Alvandpour (NORCHIP, 2013)

Clock phase imbalance and phase noise in RF N-path filters. - Fahad Qazi; Jerzy J. Dabrowski (ECCTD, 2015)

Passive SC Sigma Delta Modulators Revisited: Analysis and Design Study. - Fahad Qazi; Jerzy J. Dabrowski (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

RF calibration of on-chip DfT chain by DC stimuli and statistical multivariate regression technique. - Rashad Ramzan; Jerzy J. Dabrowski (Integr., 2015)

Two-Stage Highly Selective Receiver Front End Based on Impedance Transformation Filtering. - Fahad Quiz; Quoc-Tai Duong; Jerzy J. Dabrowski (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Tunable selective receiver front end with impedance transformation filtering. - Fahad Qazi; Quoc-Tai Duong; Jerzy J. Dabrowski (Int. J. Circuit Theory Appl., 2016)

Design of Two-Tone RF Generator for On-Chip IP3/IP2 Test. - Shakeel Ahmad; Jerzy J. Dabrowski (J. Electron. Test., 2019)

One-Bit ΣΔ-Encoded Stimulus Generation for On-Chip ADC Test. - Shakeel Ahmad; Jerzy J. Dabrowski (J. Circuits Syst. Comput., 2020)