Nonlinearities in SC delta-sigma A/D converters. - Jesper Steensgaard (ICECS, 1998)

Low-voltage switched-capacitor circuits. - E. Bidari; Mustafa Keskin; Franco Maloberti; Un-Ku Moon; Jesper Steensgaard; Gabor C. Temes (ISCAS (2), 1999)

Bootstrapped low-voltage analog switches. - Jesper Steensgaard (ISCAS (2), 1999)

Mismatch-shaping serial digital-to-analog converter. - Jesper Steensgaard; Un-Ku Moon; Gabor C. Temes (ISCAS (2), 1999)

Capacitor mismatch error cancellation technique for a successive approximation A/D converter. - Zhiliang Zheng; Un-Ku Moon; Jesper Steensgaard; Bo Wang; Gabor C. Temes (ISCAS (2), 1999)

Digital techniques for improving the accuracy of data converters. - Un-Ku Moon; Gabor C. Temes; Jesper Steensgaard (IEEE Commun. Mag., 1999)

A switched-capacitor DAC with analog mismatch correction. - Un-Ku Moon; José Silva 002; Jesper Steensgaard; Gabor C. Temes (ISCAS, 2000)

Multibit Sigma-Delta ADC with mixed-mode DAC error correction. - Peter Kiss; Un-Ku Moon; Jesper Steensgaard; John T. Stonick; Gabor C. Temes (ISCAS (1), 2001)

High-resolution mismatch-shaping digital-to-analog converters. - Jesper Steensgaard (ISCAS (1), 2001)

Design-oriented estimation of thermal noise in switched-capacitor circuits. - Richard Schreier; José B. Silva; Jesper Steensgaard; Gabor C. Temes (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

A 18 mW CT ΔΣ modulator with 25 MHz bandwidth for next generation wireless applications. - Xuefeng Chen; Yan Wang; Yoshihisa Fujimoto; Pascal Lo Ré; Yusuke Kanazawa; Jesper Steensgaard; Gabor C. Temes (CICC, 2007)

Noise-Power Optimization of Incremental Data Converters. - Jesper Steensgaard; Zhiqing Zhang; Wenhuan Yu; Attila Sárhegyi; Luca Lucchese; Dae-Ik Kim; Gabor C. Temes (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Maintaining a Centerpoint in the Plane with Amortized Optimal Logarithmic Insertions. - Morten Eskildsen; Matias Frank Jensen; Sebastian Kolby; Jesper Steensgaard (CCCG, 2019)

Further Unifying the Landscape of Cell Probe Lower Bounds. - Kasper Green Larsen; Jonathan Lindegaard Starup; Jesper Steensgaard (SOSA, 2021)

A 24b 2MS/s SAR ADC with 0.03ppm INL and 106.3dB DR in 180nm CMOS. - Jesper Steensgaard; Richard Reay; Raymond Perry; Dave Thomas; Geoffrey Tu; George Reitsma (ISSCC, 2022)

A Truly Symbolic Linear-Time Algorithm for SCC Decomposition. - Casper Abild Larsen; Simon Meldahl Schmidt; Jesper Steensgaard; Anna Blume Jakobsen; Jaco van de Pol; Andreas Pavlogiannis (TACAS (2), 2023)