A Gate-Delay Model for high-Speed CMOS Circuits. - Florentin Dartu; Noel Menezes; Jessica Qian; Lawrence T. Pillage (DAC, 1994)

Modeling the "Effective capacitance" for the RC interconnect of CMOS gates. - Jessica Qian; Satyamurthy Pullela; Lawrence T. Pillage (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)