MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time [Sigma, Delta] Modulators. - Jesús Ruiz-Amaya; Josep Lluís de la Rosa; Fernando Medeiro; Francisco V. Fernández 001; Rocío del Río; Maria Belen Pérez-Verdú; Ángel Rodríguez-Vázquez (DATE, 2004)

An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ΣΔ modulators in the Matlab/Simulink environment. - Jesús Ruiz-Amaya; José M. de la Rosa 001; Fernando Medeiro; Francisco V. Fernández 001; Rocío del Río; Maria Belen Pérez-Verdú; Ángel Rodríguez-Vázquez (ISCAS (5), 2004)

Behavioral modeling simulation and high-level synthesis of pipeline A/D converters. - Jesús Ruiz-Amaya; José M. de la Rosa 001; Manuel Delgado-Restituto; Ángel Rodríguez-Vázquez (ISCAS (6), 2005)

An embedded 12-bit 80MS/s A/D/A interface for power-line communications in 0.13µm pure digital CMOS technology. - Manuel Delgado-Restituto; Jesús Ruiz-Amaya; José M. de la Rosa 001; Juan Francisco Fernández-Bootello; Leila Díez; Rocío del Río Fernández; Ángel Rodríguez-Vázquez (ISCAS (5), 2005)

High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models. - Jesús Ruiz-Amaya; José M. de la Rosa 001; Francisco V. Fernández 001; Fernando Medeiro; Rocío del Río; Maria Belen Pérez-Verdú; Ángel Rodríguez-Vázquez (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

A 12-bit CMOS Current Steering D/A Converter for Embedded Systems. - Jesús Ruiz-Amaya; Manuel Delgado-Restituto; Juan Francisco Fernández-Bootello; Davide Brandano; Rafael Castro-López; José M. de la Rosa 001 (APCCAS, 2006)

A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technology. - Davide Brandano; Manuel Delgado-Restituto; Jesús Ruiz-Amaya; Ángel Rodríguez-Vázquez (ECCTD, 2007)

Design procedure for optimizing the power consumption of two-stage Miller compensated amplifiers in SC circuits. - Jesús Ruiz-Amaya; Juan Francisco Fernández-Bootello; Manuel Delgado-Restituto (ECCTD, 2007)

Electrical-level synthesis of pipeline ADCs. - Jesús Ruiz-Amaya; Manuel Delgado-Restituto; Ángel Rodríguez-Vázquez (APCCAS, 2008)

An ultra-low power consumption 1-V, 10-bit succesive approximation ADC. - Alberto Rodríguez-Pérez; Manuel Delgado-Restituto; Jesús Ruiz-Amaya; Fernando Medeiro (ICECS, 2008)

Accurate Settling-Time Modeling and Design Procedures for Two-Stage Miller-Compensated Amplifiers for Switched-Capacitor Circuits. - Jesús Ruiz-Amaya; Manuel Delgado-Restituto; Ángel Rodríguez-Vázquez (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A power efficient neural spike recording channel with data bandwidth reduction. - Alberto Rodríguez-Pérez; Jesús Ruiz-Amaya; Jose Antonio Rodríguez-Rodríguez; Manuel Delgado-Restituto; Ángel Rodríguez-Vázquez (ISCAS, 2011)

Transistor-Level Synthesis of Pipeline Analog-to-Digital Converters Using a Design-Space Reduction Algorithm. - Jesús Ruiz-Amaya; Manuel Delgado-Restituto; Ángel Rodríguez-Vázquez (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Behavioral modeling of pipeline ADC building blocks. - Jesús Ruiz-Amaya; Manuel Delgado-Restituto; Ángel Rodríguez-Vázquez (Int. J. Circuit Theory Appl., 2012)

A Low-Power Programmable Neural Spike Detection Channel With Embedded Calibration and Data Compression. - Alberto Rodríguez-Pérez; Jesús Ruiz-Amaya; Manuel Delgado-Restituto; Ángel Rodríguez-Vázquez (IEEE Trans. Biomed. Circuits Syst., 2012)

A Low Noise Amplifier for Neural Spike Recording Interfaces. - Jesús Ruiz-Amaya; Alberto Rodríguez-Pérez; Manuel Delgado-Restituto (Sensors, 2015)