100Gb/s ethernet chipsets in 65nm CMOS technology. - Jhih-Yu Jiang; Ping-Chuan Chiang; Hao-Wei Hung; Chen-Lun Lin; Ty Yoon; Jri Lee (ISSCC, 2013)

4×25 Gb/s Transceiver With Optical Front-end for 100 GbE System in 65 nm CMOS Technology. - Ping-Chuan Chiang; Jhih-Yu Jiang; Hao-Wei Hung; Chin-Yang Wu; Gaun-Sing Chen; Jri Lee (IEEE J. Solid State Circuits, 2015)