Low-Power Hybrid Turbo Decoding Based on Reverse Calculation. - Hye-Mi Choi; Ji-Hoon Kim 003; In-Cheol Park (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

Twiddle factor transformation for pipelined FFT processing. - In-Cheol Park; WonHee Son; Ji-Hoon Kim 003 (ICCD, 2007)

Energy-Efficient Double-Binary Tail-Biting Turbo Decoder Based on Border Metric Encoding. - Ji-Hoon Kim 003; In-Cheol Park (ISCAS, 2007)

Long-Point FFT Processing Based on Twiddle Factor Table Reduction. - Ji-Hoon Kim 003; In-Cheol Park (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Duo-binary circular turbo decoder based on border metric encoding for WiMAX. - Ji-Hoon Kim 003; In-Cheol Park (ASP-DAC, 2008)

Double-Binary Circular Turbo Decoding Based on Border Metric Encoding. - Ji-Hoon Kim 003; In-Cheol Park (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A unified parallel radix-4 turbo decoder for mobile WiMAX and 3GPP-LTE. - Ji-Hoon Kim 003; In-Cheol Park (CICC, 2009)

Bit-Level Extrinsic Information Exchange Method for Double-Binary Turbo Codes. - Ji-Hoon Kim 003; In-Cheol Park (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Design and Implementation of Turbo Decoder for TETRA Release 2 - TEDS. - Ji-Hoon Kim 003 (ICHIT (1), 2011)

Design of TETRA Release 2 turbo decoder with low-complexity hardware interleaver. - Ji-Hoon Kim 003 (ISOCC, 2011)

Memory reduced MAP decoding for double-binary turbo decoder. - Ji-Hoon Kim 003 (IEICE Electron. Express, 2011)

Design of TETRA 2 turbo decoder with minimum memory hardware interleaver. - Ji-Hoon Kim 003 (ISCAS, 2012)

A new digital predistortion technique for analog beamforming systems. - Chan-Won Park; Eui-Rim Jeong; Ji-Hoon Kim 003 (IEICE Electron. Express, 2016)

Low-Power Photoplethysmogram Acquisition Integrated Circuit with Robust Light Interference Compensation. - Jongpal Kim; Jihoon Kim 003; Hyoungho Ko (Sensors, 2016)

High-Throughput Non-Binary LDPC Decoder Based on Aggressive Overlap Scheduling. - Injun Choi; Ji-Hoon Kim 003 (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A 110dB-CMRR 100dB-PSRR multi-channel neural-recording amplifier system using differentially regulated rejection ratio enhancement in 0.18μm CMOS. - Sehwan Lee; Arup K. George; Taeju Lee; Jun-Uk Chu; Sungmin Han; Ji-Hoon Kim 003; Minkyu Je; Junghyup Lee (ISSCC, 2018)

Secure circuit with optical energy harvesting against unpowered physical attacks. - Hyungseup Kim; Youngwoon Ko; Yeongjin Mun; Byeoncheol Lee; Dong Kyue Kim; Byong-Deok Choi; Ji-Hoon Kim 003; Hyoungho Ko (Comput. Electr. Eng., 2018)

Memory-Reduced Non-Binary LDPC Decoding With Accumulative Bubble Check. - Injun Choi; Ji-Hoon Kim 003 (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Low-Complexity Elliptic Curve Cryptography Processor Based on Configurable Partial Modular Reduction Over NIST Prime Fields. - Piljoo Choi; Mun-Kyu Lee; Ji-Hoon Kim 003; Dong Kyue Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A 110.3-bits/min 8-Ch SSVEP-based Brain-Computer Interface SoC with 87.9% Accuracy. - Wooseok Byun; Dokyun Kim; Sung Yeon Kim; Ji-Hoon Kim 003 (A-SSCC, 2019)

A Multimodal Multichannel Neural Activity Readout IC with 0.7μW/Channel Ca2+-Probe-Based Fluorescence Recording and Electrical Recording. - Taeju Lee; Jee-Ho Park; Ji-Hyoung Cha; Namsun Chou; Doojin Jang; Ji-Hoon Kim 003; Il-Joo Cho; Seong-Jin Kim; Minkyu Je (VLSI Circuits, 2019)

Fast and Power-Analysis Resistant Ring Lizard Crypto-Processor Based on the Sparse Ternary Property. - Piljoo Choi; Ji-Hoon Kim 003; Dong Kyue Kim (IEEE Access, 2019)

High-Speed Visual Target Identification for Low-Cost Wearable Brain-Computer Interfaces. - Dokyun Kim; Wooseok Byun; Yunseo Ku; Ji-Hoon Kim 003 (IEEE Access, 2019)

A 40-GHz Mirrored-Cascode Differential Transimpedance Amplifier in 65-nm CMOS. - Sang Gyun Kim; Chaerin Hong; Yun Seong Eo; Ji-Hoon Kim 003; Sung Min Park 001 (IEEE J. Solid State Circuits, 2019)

A Real-Time Depth of Anesthesia Monitoring System Based on Deep Neural Network With Large EDO Tolerant EEG Analog Front-End. - Yongjae Park; Su-Hyun Han 001; Wooseok Byun; Ji-Hoon Kim 003; Hyung-Chul Lee; Seong-Jin Kim (IEEE Trans. Biomed. Circuits Syst., 2020)

Secure IC with Countermeasure to Unpowered Physical Attack using On-chip Photodiode and Charge Pump. - Hyunwoo Heo; Donggeun You; Hyungseup Kim; Yongsu Kwon; Hyoungho Ko; Dong Kyue Kim; Byong-Deok Choi; Ji-Hoon Kim 003 (ICEIC, 2021)

ML-Based Humidity and Temperature Calibration System for Heterogeneous MOx Sensor Array in ppm-Level BTEX Monitoring. - Sujin Kim; Hoyong Sung; Sohyeon Kim; Minkyu Je; Ji-Hoon Kim 003 (ISCAS, 2021)

21.1 A 1.125Gb/s 28mW 2m-Radio-Range IR-UWB CMOS Transceiver. - Geunhaeng Lee; Sanghwa Lee; Ji-Hoon Kim 003; Tae Wook Kim (ISSCC, 2021)

A 2144.2-bits/min/mW 5-Heterogeneous PE-based Domain-Specific Reconfigurable Array Processor for 8-Ch Wearable Brain-Computer Interface SoC. - Wooseok Byun; Minkyu Je; Ji-Hoon Kim 003 (VLSI Circuits, 2021)

Post-Quantum Cryptography Coprocessor for RISC-V CPU Core. - Jihye Lee; Whijin Kim; Sohyeon Kim; Ji-Hoon Kim 003 (ICEIC, 2022)

Machine Learning-based Wearable Bio-processor for Real-Time Blood Pressure Estimation. - Jee-Ye Yoon; Hayeon Kim; Eun-Gyeong Ham; Hannah Yang; Ji-Hoon Kim 003 (ICEIC, 2022)

SQNR-based Layer-wise Mixed-Precision Schemes with Computational Complexity Consideration. - Ha-Na Kim; Hyun Eun; Jung Hwan Choi; Ji-Hoon Kim 003 (ISCAS, 2022)

An IR-UWB CMOS Transceiver With Extended Pulse Position Modulation. - Geunhaeng Lee; Junyoung Jang 002; Ji-Hoon Kim 003; Tae Wook Kim (IEEE J. Solid State Circuits, 2022)

An Indoor-Monitoring LiDAR Sensor for Patients with Alzheimer Disease Residing in Long-Term Care Facilities. - Ji-Eun Joo; Yu Hu; Sujin Kim; Hyunji Kim; Sunyoung Park; Ji-Hoon Kim 003; Younghyun Kim 001; Sung Min Park 001 (Sensors, 2022)

Architectural Supports for Block Ciphers in a RISC CPU Core by Instruction Overloading. - Piljoo Choi; Won Bae Kong; Ji-Hoon Kim 003; Mun-Kyu Lee; Dong Kyue Kim (IEEE Trans. Computers, 2022)

An Energy-Efficient Domain-Specific Reconfigurable Array Processor With Heterogeneous PEs for Wearable Brain-Computer Interface SoCs. - Wooseok Byun; Minkyu Je; Ji-Hoon Kim 003 (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A 46-nF/10-MΩ Range 114-aF/0.37-Ω Resolution Parasitic- and Temperature-Insensitive Reconfigurable RC-to-Digital Converter in 0.18-μm CMOS. - Arup K. George; Wooyoon Shim; Jaeha Kung; Ji-Hoon Kim 003; Minkyu Je; Junghyup Lee (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Advances in Wearable Brain-Computer Interfaces From an Algorithm-Hardware Co-Design Perspective. - Wooseok Byun; Minkyu Je; Ji-Hoon Kim 003 (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A DRAM Bandwidth-Scalable Sparse Matrix-Vector Multiplication Accelerator with 89% Bandwidth Utilization Efficiency for Large Sparse Matrix. - Hyunji Kim; Eunkyung Ham; Sunyoung Park; Hana Kim; Ji-Hoon Kim 003 (A-SSCC, 2023)

Verilator-based Fast Verification Methodology for BLE MAC Hardware. - Eunkyung Ham; Yujin Jeon; Jaeyun Lim; Ji-Hoon Kim 003 (ICEIC, 2023)

Hardware-Software Co-Design of AES-CCM for Bluetooth LE Security. - Yujin Jeon; Eunkyung Ham; Jaeyun Lim; Ji-Hoon Kim 003 (ICEIC, 2023)

High-Level AMBA Monitoring Platform for SoC Architecture Exploration. - Jaeyun Lim; Yujin Jeon; Eunkyung Ham; Ji-Hoon Kim 003 (ICEIC, 2023)

Complexity-Aware Layer-Wise Mixed-Precision Schemes With SQNR-Based Fast Analysis. - Hana Kim; Hyun Eun; Jung Hwan Choi; Ji-Hoon Kim 003 (IEEE Access, 2023)

Multi-Mode SpMV Accelerator for Transprecision PageRank With Real-World Graphs. - Whijin Kim; Hana Kim; Jihye Lee; Hyunji Kim; Ji-Hoon Kim 003 (IEEE Access, 2023)

PA-2SBF: Pattern-Adaptive Two-Stage Bloom Filter for Run-Time Memory Diagnostic Data Compression in Automotive SoCs. - Sunyoung Park; Hyunji Kim; Hana Kim; Ji-Hoon Kim 003 (DATE, 2024)

Optimized Transform Entropy Decoding Architecture for VDC-M. - Saeyeon Kim; Sohyeon Kim; Hannah Yang; Heejin Roh; Jiyoung Lee; Ji-Hoon Kim 003 (ICEIC, 2024)

Dynamic Resource Management in Reconfigurable SoC for Multi-Tenancy Support. - Sohyeon Kim; Injun Choi; Minkyu Je; Ji-Hoon Kim 003 (ISCAS, 2024)

Algorithm-Hardware Co-Design for Wearable BCIs: An Evolution from Linear Algebra to Transformers. - Sunyoung Park; Wooseok Byun; Minkyu Je; Ji-Hoon Kim 003 (ISCAS, 2024)

Vector Similarity Search Acceleration using DRAM-based Processing-In-Memory (PIM). - Min Jung; Sujin Kim; Haechannuri Noh; Huijin Roh; Nahyeon Kim; Ji-Hoon Kim 003 (ICEIC, 2025)

Optimized Distance Calculation Support for HBM PIM(Processing-In-Memory). - Nahyeon Kim; Sujin Kim; Haechannuri Noh; Min Jung; Huijin Roh; Ji-Hoon Kim 003 (ICEIC, 2025)