New word-line driving scheme for suppressing oxide-tunneling leakage in sub-65-nm SRAMs. - Ji-Hye Bong; Yong-Jin Kwon; Kyeong-Sik Min; Sung-Mo Kang (ISQED, 2009)

Negative charge pump circuit with large output current and high power efficiency. - Ji-Hye Bong; Yong-Jin Kwon; Daejeong Kim; Kyeong-Sik Min (IEICE Electron. Express, 2009)

Low-power read circuit with self-adjusted column pulse width for diode-switch resistive RAMs. - Kwan-Hee Jo; Ji-Hye Bong; Kyeong-Sik Min (IEICE Electron. Express, 2009)

A compact Verilog-A model for Multi-Level-Cell Phase-change RAMs. - Kwan-Hee Jo; Ji-Hye Bong; Kyeong-Sik Min; Sung-Mo Kang (IEICE Electron. Express, 2009)

Sub-1-V-Output CMOS bandgap reference circuit with small area and low power consumption. - Yong-Jin Kwon; Ji-Hye Bong; Dae Hwan Kim; Kyeong-Sik Min (IEICE Electron. Express, 2009)

Oxide-Tunneling Leakage Suppressed SRAM for Sub-65-nm Very Large Scale Integrated Circuits. - Ji-Hye Bong; Kwan-Hee Jo; Kyeong-Sik Min; Sung-Mo Kang (J. Low Power Electron., 2011)