Incremental layout optimization for NoC designs based on MILP formulation. - Jia Liu 025; Yuchun Ma; Ning Xu 006; Yu Wang 002 (ASICON, 2011)

Thermal-Aware Post Layout Voltage-Island Generation for 3D ICs. - Ning Xu 006; Yuchun Ma; Jia Liu 025; Shou-Chun Tao (J. Comput. Sci. Technol., 2013)

NTIRE 2025 XGC Quality Assessment Challenge: Methods and Results. - Xiaohong Liu 001; Xiongkuo Min; Qiang Hu 003; Xiaoyun Zhang 001; Jie Guo; Guangtao Zhai; Shushi Wang; Yingjie Zhou; Lu Liu 005; Jingxin Li; Liu Yang; Farong Wen; et al. (CVPR Workshops, 2025)