Recent research and emerging challenges in design and optimization for digital microfluidic biochips. - Tsung-Wei Huang; Yan-You Lin; Jia-Wen Chang; Tsung-Yi Ho (SoCC, 2011)

An ILP-based obstacle-avoiding routing algorithm for pin-constrained EWOD chips. - Jia-Wen Chang; Tsung-Wei Huang; Tsung-Yi Ho (ASP-DAC, 2012)

Voltage-aware chip-level design for reliability-driven pin-constrained EWOD chips. - Sheng-Han Yeh; Jia-Wen Chang; Tsung-Wei Huang; Tsung-Yi Ho (ICCAD, 2012)

Integrated fluidic-chip co-design methodology for digital microfluidic biochips. - Tsung-Wei Huang; Jia-Wen Chang; Tsung-Yi Ho (ISPD, 2012)

Integrated Fluidic-Chip Co-Design Methodology for Digital Microfluidic Biochips. - Jia-Wen Chang; Sheng-Han Yeh; Tsung-Wei Huang; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

An ILP-Based Routing Algorithm for Pin-Constrained EWOD Chips With Obstacle Avoidance. - Jia-Wen Chang; Sheng-Han Yeh; Tsung-Wei Huang; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips. - Sheng-Han Yeh; Jia-Wen Chang; Tsung-Wei Huang; Shang-Tsung Yu; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)