A 6 mW 325 MS/s 8 bit SAR ADC with background offset calibration. - Xiaoge Zhu; DanYu Wu; Lei Zhou 014; Chonghe Ma; Dandan Wang; Jian Luan 002; Yinkun Huang; Jin Wu; Xinyu Liu 004 (IEICE Electron. Express, 2017)

A 10-GS/s 8-bit SiGe ADC with Isolated 4×4 Analog Input Multiplexer. - DanYu Wu; Lei Zhou 014; Huasen Liu; Yinkun Huang; Jian Luan 002; Xuan Guo; Jin Wu; Xinyu Liu 004 (ISCAS, 2019)

A 10-GS/s 8-bit 4-way interleaved folding ADC in 0.18 µm SiGe-BiCMOS. - Huasen Liu; DanYu Wu; Lei Zhou 014; Yinkun Huang; Jian Luan 002; Xuan Guo; Dong Wang 033; Xuqiang Zheng; Jin Wu; Xinyu Liu 004 (IEICE Electron. Express, 2019)

A 1 GS/s 12-bit pipelined folding ADC with a novel encoding algorithm. - Huasen Liu; DanYu Wu; Lei Zhou 014; Jian Luan 002; Xuan Guo; Dong Wang 033; Jin Wu; Xinyu Liu 004 (IEICE Electron. Express, 2019)

An 8 GSps 14 bit RF DAC With IM3<-62 dBc up to 3.6 GHz. - Dong Wang 033; Lei Zhou 014; DanYu Wu; Chonghe Ma; Jinxin Xue; Xuan Guo; Jian Luan 002; Huasen Liu; Jin Wu; Xinyu Liu 004 (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

A Real-Time Output 50-GS/s 8-bit TI-ADC with Dedicated Calibration Techniques and Deterministic Latency. - Jian Luan 002; Danyu Wu; Xuqiang Zheng; Chen Cai; Linzhen Wu; Lei Zhou 014; Jin Wu; Xinyu Liu 004 (ESSCIRC, 2021)

A 1.4-Vppd 64-Gb/s PAM-4 Transmitter with 4-Tap Hybrid FFE Employing Fractionally-Spaced Pre-Emphasis and Baud-Spaced De-Emphasis in 28-nm CMOS. - Chen Cai; Xuqiang Zheng; Yong Chen 005; Danyu Wu; Jian Luan 002; Lei Zhou 014; Jin Wu; Xinyu Liu 004 (ESSCIRC, 2021)