A cost-efficient and fully-pipelinable architecture for DCT/IDCT. - Shen-Fu Hsiao; Wei-Ren Shiue; Jian-Ming Tseng (IEEE Trans. Consumer Electron., 1999)

Parallel, Pipelined and Folded Architectures for Computation of 1-D and 2-D DCT in Image and Video Codec. - Shen-Fu Hsiao; Jian-Ming Tseng (J. VLSI Signal Process., 2001)