Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign. - Tony Nowatzki; Newsha Ardalani; Karthikeyan Sankaralingam; Jian Weng 002 (PACT, 2018)

Towards General Purpose Acceleration by Exploiting Common Data-Dependence Forms. - Vidushi Dadu; Jian Weng 002; Sihao Liu; Tony Nowatzki (MICRO, 2019)

DAEGEN: A Modular Compiler for Exploring Decoupled Spatial Accelerators. - Jian Weng 002; Sihao Liu; Vidushi Dadu; Tony Nowatzki (IEEE Comput. Archit. Lett., 2019)

Exploiting Fine-Grain Ordered Parallelism in Dense Matrix Algorithms. - Jian Weng 002; Vidushi Dadu; Tony Nowatzki (CoRR, 2019)

A Hybrid Systolic-Dataflow Architecture for Inductive Matrix Algorithms. - Jian Weng 002; Sihao Liu; Zhengrong Wang; Vidushi Dadu; Tony Nowatzki (HPCA, 2020)

DSAGEN: Synthesizing Programmable Spatial Accelerators. - Jian Weng 002; Sihao Liu; Vidushi Dadu; Zhengrong Wang; Preyas Shah; Tony Nowatzki (ISCA, 2020)

Towards General-Purpose Acceleration: Finding Structure in Irregularity. - Vidushi Dadu; Jian Weng 002; Sihao Liu; Tony Nowatzki (IEEE Micro, 2020)

UNIT: Unifying Tensorized Instruction Compilation. - Jian Weng 002; Animesh Jain; Jie Wang 022; Leyuan Wang; Yida Wang 003; Tony Nowatzki (CGO, 2021)

Stream Floating: Enabling Proactive and Decentralized Cache Optimizations. - Zhengrong Wang; Jian Weng 002; Jason Lowe-Power; Jayesh Gaur; Tony Nowatzki (HPCA, 2021)

Near-Stream Computing: General and Transparent Near-Cache Acceleration. - Zhengrong Wang; Jian Weng 002; Sihao Liu; Tony Nowatzki (HPCA, 2022)

OverGen: Improving FPGA Usability through Domain-specific Overlay Generation. - Sihao Liu; Jian Weng 002; Dylan Kupsh; Atefeh Sohrabizadeh; Zhengrong Wang; Licheng Guo; Jiuyang Liu; Maxim Zhulin; Rishabh Mani; Lucheng Zhang; Jason Cong; Tony Nowatzki (MICRO, 2022)

Unifying Spatial Accelerator Compilation With Idiomatic and Modular Transformations. - Jian Weng 002; Sihao Liu; Dylan Kupsh; Tony Nowatzki (IEEE Micro, 2022)

PIMSAB: A Processing-In-Memory System with Spatially-Aware Communication and Bit-Serial-Aware Computation. - Aman Arora 001; Jian Weng 002; Siyuan Ma; Tony Nowatzki; Lizy K. John (CoRR, 2023)

Developing, Synthesizing, and Automating Domain-Specific Accelerator - Jian Weng 002 (2023)

PIMSAB: A Processing-In-Memory System with Spatially-Aware Communication and Bit-Serial-Aware Computation. - Siyuan Ma; Kaustubh Manohar Mhatre; Jian Weng 002; Bagus Hanindhito; Zhengrong Wang; Tony Nowatzki; Lizy K. John; Aman Arora 001 (ACM Trans. Archit. Code Optim., 2024)

Assassyn: A Unified Abstraction for Architectural Simulation and Implementation. - Jian Weng 002; Boyang Han; Derui Gao; Ruijie Gao; Wanning Zhang; An Zhong; Ceyu Xu; Jihao Xin; Yangzhixin Luo; Lisa Wu Wills; Marco Canini (ISCA, 2025)