A partially reconfigurable architecture supporting hardware threads. - Ying Wang 032; Jian Yan 002; Xuegong Zhou; Lingli Wang; Wayne Luk; Chenglian Peng; Jiarong Tong (FPT, 2012)

SPREAD: A Streaming-Based Partially Reconfigurable Architecture and Programming Model. - Ying Wang 032; Xuegong Zhou; Lingli Wang; Jian Yan 002; Wayne Luk; Chenglian Peng; Jiarong Tong (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Design space exploration for FPGA-based hybrid multicore architecture. - Jian Yan 002; Junqi Yuan; Ying Wang 032; Philip H. W. Leong; Lingli Wang (FPT, 2014)

UniStream: A unified stream architecture combining configuration and data processing. - Jian Yan 002; Jifang Jin; Ying Wang 032; Xuegong Zhou; Philip H. W. Leong; Lingli Wang (FPL, 2015)

An adaptive cross-layer fault recovery solution for reconfigurable SoCs. - Jifang Jin; Jian Yan 002; Xuegong Zhou; Lingli Wang (FPT, 2015)

Lossless Compression Decoders for Bitstreams and Software Binaries Based on High-Level Synthesis. - Jian Yan 002; Junqi Yuan; Philip Heng Wai Leong; Wayne Luk; Lingli Wang (IEEE Trans. Very Large Scale Integr. Syst., 2017)