Through-Silicon-Via assignment for 3D ICs. - Jianchang Ao; Sheqin Dong; Song Chen 001; Satoshi Goto (ASICON, 2011)

Delay-driven layer assignment in global routing under multi-tier interconnect structure. - Jianchang Ao; Sheqin Dong; Song Chen 001; Satoshi Goto (ISPD, 2013)

Delay-Driven and Antenna-Aware Layer Assignment in Global Routing Under Multitier Interconnect Structure. - Sheqin Dong; Jianchang Ao; Fuqi Luo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Modelling Long-distance Node Relations for KBQA with Global Dynamic Graph. - Xu Wang; Shuai Zhao 001; Jiale Han 001; Bo Cheng 001; Hao Yang 006; Jianchang Ao; Zhenzi Li (COLING, 2020)