The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes. - Jiandong Mu; Aida Vosoughi; João Andrade; Alexios Balatsoukas-Stimming; Georgios Karakonstantis; Andreas Burg 001; Gabriel Falcão 001; Vítor Manuel Mendes da Silva; Joseph R. Cavallaro (ACSSC, 2015)

A Collaborative Framework for FPGA-based CNN Design Modeling and Optimization. - Jiandong Mu; Wei Zhang 012; Hao Liang 003; Sharad Sinha (FPL, 2018)

A Cost-Effective CNN Accelerator Design with Configurable PU on FPGA. - Chi Fung Brian Fong; Jiandong Mu; Wei Zhang 012 (ISVLSI, 2019)

A History-Based Auto-Tuning Framework for Fast and High-Performance DNN Design on GPU. - Jiandong Mu; Mengdi Wang; Lanbo Li; Jun Yang 052; Wei Lin 016; Wei Zhang 012 (DAC, 2020)

Optimizing OpenCL-Based CNN Design on FPGA with Comprehensive Design Space Exploration and Collaborative Performance Modeling. - Jiandong Mu; Wei Zhang 012; Hao Liang 003; Sharad Sinha (ACM Trans. Reconfigurable Technol. Syst., 2020)

High-dimensional Bayesian Optimization for CNN Auto Pruning with Clustering and Rollback. - Jiandong Mu; Hanwei Fan; Wei Zhang 012 (CoRR, 2021)

Bayesian Optimization with Clustering and Rollback for CNN Auto Pruning. - Hanwei Fan; Jiandong Mu; Wei Zhang 012 (ECCV (23), 2022)

Boosting the Convergence of Reinforcement Learning-Based Auto-Pruning Using Historical Data. - Jiandong Mu; Mengdi Wang; Feiwen Zhu; Jun Yang 052; Wei Lin 016; Wei Zhang 012 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)