Research Progress of UniCore CPUs and PKUnity SoCs. - Xu Cheng 001; Xiaoyin Wang; Junlin Lu; Jiangfang Yi; Dong Tong 001; Xuetao Guan; Feng Liu; Xianhua Liu 001; Chun Yang; Yi Feng 003 (J. Comput. Sci. Technol., 2010)

CGA: Combining cluster analysis with genetic algorithm for regression suite reduction of microprocessors. - Liucheng Guo; Jiangfang Yi; Liang Zhang; Xiaoyin Wang; Dong Tong 001 (SoCC, 2011)

S/DC: A storage and energy efficient data prefetcher. - Xianglei Dang; Xiaoyin Wang; Dong Tong 001; Junlin Lu; Jiangfang Yi; Keyi Wang (DATE, 2012)

SOLE: Speculative one-cycle load execution with scalability, high-performance and energy-efficiency. - Zhen-Hao Zhang; Dong Tong 001; Xiaoyin Wang; Jiangfang Yi; Keyi Wang (ICCD, 2012)

Active Store Window: Enabling Far Store-Load Forwarding with Scalability and Complexity-Efficiency. - Zhen-Hao Zhang; Xiaoyin Wang; Dong Tong 001; Jiangfang Yi; Junlin Lu; Keyi Wang (J. Comput. Sci. Technol., 2012)

VFCC: A verification framework of cache coherence using parallel simulation. - Qiaoli Xiong; Jiangfang Yi; Tianbao Song; Zichao Xie; Dong Tong 001 (ASP-DAC, 2013)

Making a real processor step by step using RISC-VISA. - Jiangfang Yi; Hongwei Cui (TURC, 2018)

Coalesced TLB to Exploit Diverse Contiguity of Memory Mapping. - Yikun Ban; Yuchen Zhou; Jingrui He; Xu Cheng 001; Jiangfang Yi (CoRR, 2019)

FlexPointer: Fast Address Translation Based on Range TLB and Tagged Pointers. - Dongwei Chen; Dong Tong 001; Chun Yang; Jiangfang Yi; Xu Cheng 001 (ACM Trans. Archit. Code Optim., 2023)

Hyperion: A Highly Effective Page and PC Based Delta Prefetcher. - Yujie Cui; Wei Chen; Xu Cheng 001; Jiangfang Yi (ACM Trans. Archit. Code Optim., 2024)

Bridging the Gap between Hardware Fuzzing and Industrial Verification. - Ruiyang Ma; Tianhao Wei; Jiaxi Zhang 001; Chun Yang; Jiangfang Yi; Guojie Luo (ACM Great Lakes Symposium on VLSI, 2025)