Wavelet packet division multiplexing and wavelet packet design under timing error effects. - Kon Max Wong; Jiangfeng Wu; Timothy N. Davidson; Qu Jin (IEEE Trans. Signal Process., 1997)

A Table-Based Time-Domain Simulation Method for Oversampled Microelectromechanical Systems. - Jiangfeng Wu; L. Richard Carley (BMAS, 2000)

Bayesian and Dempster-Shafer target identification for radar surveillance. - Henry Leung; Jiangfeng Wu (IEEE Trans. Aerosp. Electron. Syst., 2000)

Performance of wavelet packet-division multiplexing in impulsive and Gaussian noise. - Kon Max Wong; Jiangfeng Wu; Timothy N. Davidson; Qu Jin; Pak-Chung Ching (IEEE Trans. Commun., 2000)

A simulation study of electromechanical delta-sigma modulators. - Jiangfeng Wu; L. Richard Carley (ISCAS (3), 2001)

A low-noise low-offset capacitive sensing amplifier for a 50-μg√Hz monolithic CMOS MEMS accelerometer. - Jiangfeng Wu; Gary K. Fedder; L. Richard Carley (IEEE J. Solid State Circuits, 2004)

Electromechanical ΔΣ modulation with high-Q micromechanical accelerometers and pulse density modulated force feedback. - Jiangfeng Wu; L. Richard Carley (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

A 10Gb/s IEEE 802.3an-Compliant Ethernet Transceiver for 100m UTP Cable in 0.13μm CMOS. - Sandeep Gupta; José Tellado; Sridhar Begur; Frank Yang; Vishnu Balan; Michael A. Inerfield; Dariush Dabiri; John Dring; Sachin Goel; Kumaraguru Muthukumaraswamy; Frank McCarthy; Glenn Golden; et al. (ISSCC, 2008)

Simulation system design of a small-scale unmanned helicopter. - Hongbin Deng; Jinhua Wang; Peizhi Liu; Cheng-Lin Zhou; Jiangfeng Wu (Int. J. Model. Identif. Control., 2011)

A 240mW 2.1GS/s 12b pipeline ADC using MDAC equalization. - Jiangfeng Wu; Chun-Ying Chen; Tianwei Li; Wenbo Liu; Lin He 006; Shauhyuarn Sean Tsai; Binning Chen; Chun-Sheng Huang; Juo-Jung Hung; Wei-Ta Shih; Hing T. Hung; Steven Jaffe; et al. (CICC, 2012)

A 40 nm CMOS analog front end with enhanced audio for HSPA/EDGE multimedia applications. - Xicheng Jiang; Min-Gyu Kim; Felix Cheung; Fang Lin; Hui Zheng; Jianlong Chen; Alex Jianzhong Chen; Darwin Cheung; Khaled Abdelfattah; Seong-Ho Lee; Hanson Hung-Sen Huang; Kishore Kasichainula; et al. (ESSCIRC, 2012)

A 12-Bit 3 GS/s Pipeline ADC With 0.4 mm2 and 500 mW in 40 nm Digital CMOS. - Chun-Ying Chen; Jiangfeng Wu; Juo-Jung Hung; Tianwei Li; Wenbo Liu; Wei-Ta Shih (IEEE J. Solid State Circuits, 2012)

Radio-wave detection and estimation of sub-surface hydraulic fractures at MF band. - Jiangfeng Wu; Kamal Sarabandi (IGARSS, 2013)

A 240-mW 2.1-GS/s 52-dB SNDR Pipeline ADC Using MDAC Equalization. - Jiangfeng Wu; Chun-Ying Chen; Tianwei Li; Lin He 006; Wenbo Liu; Wei-Ta Shih; Shauhyuarn Sean Tsai; Binning Chen; Chun-Sheng Huang; Bryan Juo-Jung Hung; Hing T. Hung; Steven Jaffe; et al. (IEEE J. Solid State Circuits, 2013)

Super-miniaturized borehole antenna design and radio-wave estimation of sub-surface hydraulic fractures at MF band. - Jiangfeng Wu; Kamal Sarabandi (IGARSS, 2014)

26.6 A 5GS/S 150mW 10b SHA-less pipelined/SAR hybrid ADC in 28nm CMOS. - Massimo Brandolini; Young Shin; Karthik Raviprakash; Tao Wang 010; Rong Wu; Hemasundar Mohan Geddada; Yen-Jen Ko; Yen Ding; Chun-Sheng Huang; Wei-Ta Shih; Ming-Hung Hsieh; Wei-Te Chou; et al. (ISSCC, 2015)

A 2.7mW/Channel 48-to-1000MHz Direct Sampling Full-Band Cable Receiver. - Jiangfeng Wu; Giuseppe Cusmai; Acer Wei-Te Chou; Tao Wang 010; Bo Shen; Vijayaramalingam Periasamy; Ming-Hung Hsieh; Chun-Ying Chen; Lin He 006; Loke Tan; Aravind Padyana; Cheng-Hsun Yang; et al. (VLSIC, 2015)

A 5 GS/s 150 mW 10 b SHA-Less Pipelined/SAR Hybrid ADC for Direct-Sampling Systems in 28 nm CMOS. - Massimo Brandolini; Young Shin; Karthik Raviprakash; Tao Wang 010; Rong Wu; Hemasundar Mohan Geddada; Yen-Jen Ko; Yen Ding; Chun-Sheng Huang; Wei-Ta Shih; Ming-Hung Hsieh; Wei-Te Chou; et al. (IEEE J. Solid State Circuits, 2015)

Microwave Backscatter From Arctic Lake Ice and Polarimetric Implications. - Donald K. Atwood; Grant Gunn; Chris Roussi; Jiangfeng Wu; Claude R. Duguay; Kamal Sarabandi (IEEE Trans. Geosci. Remote. Sens., 2015)

Intelligent battery management for electric and hybrid electric vehicles: A survey. - Yong Feng 001; Zhenwei Cao; Weixiang Shen; Xinghuo Yu 001; Fengling Han; Rita Chen; Jiangfeng Wu (ICIT, 2016)

Scattering phenomenology of arctic lake ice. - Jiangfeng Wu; Don Atwood; Kamal Sarabandi (IGARSS, 2016)

27.6 A 4GS/s 13b pipelined ADC with capacitor and amplifier sharing in 16nm CMOS. - Jiangfeng Wu; Acer Wei-Te Chou; Tianwei Li; Rong Wu; Tao Wang 010; Giuseppe Cusmai; Sha-Ting Lin; Cheng-Hsun Yang; Greg Unruh; Sunny Raj Dommaraju; Mo M. Zhang; Po Tang Yang; et al. (ISSCC, 2016)

A 2.7 mW/Channel 48-1000 MHz Direct Sampling Full-Band Cable Receiver. - Jiangfeng Wu; Giuseppe Cusmai; Acer Wei-Te Chou; Tao Wang 010; Bo Shen; Vijayaramalingam Periasamy; Ming-Hung Hsieh; Chun-Ying Chen; Lin He 006; Loke Kun Tan; Aravind Padyana; Vincent Cheng-Hsun Yang; et al. (IEEE J. Solid State Circuits, 2016)

Session 21 - Analog techniques II. - Farhan Adil; Jiangfeng Wu (CICC, 2017)

Duty Cycle Distortion in Half-rate Nyquist DACs with Limited Output Bandwidth. - Bao Li 003; Long Zhao; Jiangfeng Wu; Yuhua Cheng (ISCAS, 2018)

A 12GS/s 6-bit DAC with 4-2 Segmentation in 40nm CMOS. - Bao Li 003; Long Zhao; Jiangfeng Wu; Yuhua Cheng (ISCAS, 2018)

A 5-Bit 500-MS/s Asynchronous Digital Slope ADC With Two Comparators. - Yujun Shu; Fengyi Mei; Youling Yu; Jiangfeng Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

High Linear Ring Amplifier Design with Analysis on Settling Procedures. - Yongzhen Chen; Jiangfeng Wu (ASICON, 2019)

An Area-Efficient Multi-Rate Digital Decimator. - Qi Li; Yujun Shu; Yongzhen Chen; Jiangfeng Wu (ASICON, 2019)

A Double-Latch Comparator for Multi-GS/s SAR ADCs in 28nm CMOS. - Pingshun Ma; Yongzhen Chen; Jiangfeng Wu (ASICON, 2019)

Physical Coding Sublayer For 32Gbps SerDes Based On JESD204C. - Xiaozhe Wang; Lingzhi Su; Xiyuan Du; Yongzhen Chen; Jiangfeng Wu (ASICON, 2021)

Digital Calibration of Capacitor Mismatch and Gain Error in Pipelined SAR ADCs. - Yunchuan Wang; Li Zhang; Fengyi Mei; Yongzhen Chen; Jiangfeng Wu (ASICON, 2021)

A 6-bit Active Phase Shifter with Quadrature Outputs. - Yujie Wu; Gang Zhang; Yongzhen Chen; Jiangfeng Wu (ASICON, 2021)

An Input Buffer for 4 GS/s 14-b Time-Interleaved ADC. - Li Zhang; Yunchuan Wang; Fengyi Mei; Yongzhen Chen; Jiangfeng Wu (ASICON, 2021)

A 161mW 32Gb/s ADC-Based NRZ SerDes Receiver Front End in 28nm. - Runze Chi; Junkun Chen; Youzhi Gu; Jiangfeng Wu; Yongzhen Chen (ICTA, 2021)

A 2-GS/s 200-MHz BW Oversampling Continuous-Time Pipeline ADC with Adaptive Digital Filter in 28nm. - Liran Dong; Yujun Shu; Yongzhen Chen; Jiangfeng Wu (ICTA, 2021)

A 32Gb/s NRZ Wireline Transmitter with CMFB- Based CML Driver in 28nm CMOS Technology. - Youzhi Gu; Junkun Chen; Xiaolin Li; Yongzhen Chen; Jiangfeng Wu (MWSCAS, 2021)

A 71dB DC Gain, 0.1% THD, 0.5-V Bulk-Driven Class-AB OTA Achieved by Novel CMFB Methods. - Yangxin Xiang; Saisai Jin; Yongzhen Chen; Jiangfeng Wu (MWSCAS, 2021)

0.7-6 GHz Programable Gain Push-Pull Driver PA Based on Dual-Loop Biases. - Minghao Jiang; Chenyang Han; Weibo Li; Jiangfeng Wu; Yongzhen Chen (APCCAS, 2022)

A 64Gb/s PAM-4 Digital Equalizer With Tap-Configurable FFE and Partially Unrolled DFE in 28nm CMOS. - Xinjie Feng; Yongzhen Chen; Youzhi Gu; Jiangfeng Wu (ICTA, 2022)

A Current-Mode, 30 dB Range with 0.5 dB Step, 0.1 to 6 GHz Attenuator for Wideband Receiver. - Yangxin Xiang; Chenyang Han; Cuixia Wang; Jiangfeng Wu; Yongzhen Chen (MWSCAS, 2022)

A 32GS/s 7bit TI-SAR ADC in 28nm for 32Gb/s ADC-Based SerDes Receiver. - Jun Chen; Fengyi Mei; Mingzhe Liu; Yongzhen Chen; Jiangfeng Wu (ASICON, 2023)

Complexity-Reduced Joint Calibration for Nonlinearity and I/Q Imbalance in Direct-Conversion Transmitters. - Weibo Li; Minghao Jiang; Yongzhen Chen; Jiangfeng Wu (ASICON, 2023)

Pipelined-SAR ADC Calibration Technique Based on Gain-Bit Weights. - Hang Ling; Yifei Bai; Fengyi Mei; Huajun Yao; Yongzhen Chen; Jiangfeng Wu (ASICON, 2023)

A low-power daisy-chain controller implemention in BMS based on power mode switching. - Xinhao Xu; Yongzhen Chen; Jiangfeng Wu (ASICON, 2023)

A Low-power Digital Automatic Gain Control Design in Wireless Communication Receivers. - Jiangshan Zhao; Jiankun Huang; Yongzhen Chen; Jiangfeng Wu (ASICON, 2023)

A 4.75-64 Gb/s PAM-4 Wireline Transmitter with 3-tap FFE in 28-nm CMOS. - Junkun Chen; Youzhi Gu; Miaomiao Xu; Yongzhen Chen; Cuixia Wang; Jiangfeng Wu (ISCAS, 2023)

A Foreground LSB-Based Capacitor Mismatch Calibration Method in An 18-bit SAR ADC. - Jie Ding; Yongzhen Chen; Cuixia Wang; Jiangfeng Wu (ISCAS, 2023)

A Wideband Receiver I/Q Mismatch Calibration Method in FDD Transceiver. - Huajun Yao; Yangxin Xiang; Yongzhen Chen; Cuixia Wang; Jiangfeng Wu (ISCAS, 2023)

A BJT-Based Temperature Sensor Achieving an Inaccuracy of ±0.3°C (3σ) and a 6.605 pJ∙K2 Resolution FoM in 28-nm CMOS. - Chenyang Han; Yujun Shu; Tianwei Li; Jiangfeng Wu; Yongzhen Chen (APCCAS, 2024)

A 40Gb/s Multi-band Wireline Receiver Analog Front-end for 50.4dB Channel Loss Compensation. - Mingzhe Liu; Yongzhen Chen; Jiangfeng Wu; Cuixia Wang (MWSCAS, 2024)

Design and Implementation of an EMI-Immune Daisy Chain Interface With a PID-Based CDR Algorithm for Battery Management System Communication. - Zihan Zheng; Yongzhen Chen; Jie Ding; Xinhao Xu; Kuan Deng; Yangxin Xiang; Weibo Li; Jiangfeng Wu (IEEE Access, 2024)

A Foreground Wide-Band Receiver I/Q Mismatch Calibration Method in FDD Transceiver. - Huajun Yao; Yangxin Xiang; Yongzhen Chen; Jiangfeng Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A 0.5-V 0.02% THD Bulk-Driven OTA for Continuous-Time Applications in 180 nm CMOS. - Yangxin Xiang; Huajun Yao; Minghao Jiang; Junkun Chen; Yongzhen Chen; Jiangfeng Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Mitigating High-Scale Dominance in WSI Classification: A Cross-Attention and Hard Instance Mining Framework. - Shaoguo Cui; Fumin Cheng; Duozhi Cheng; Jiangfeng Wu; Guofen Wang (ICIC (25), 2025)

KSIR-MIL: Key Region Selection and Instance Refinement for Multi-instance Learning in Whole Slide Image Classification. - Shaoguo Cui; Jiangfeng Wu; Binbin Sang; Tiansong Li; Yi Zhang; Fumin Cheng; Guofen Wang (ICIC (25), 2025)

A Rapid Binary Search-Based Capacitor Mismatch Calibration Algorithm. - Yifei Bai; Huajun Yao; Fengyi Mei; Cuixia Wang; Yongzhen Chen; Jiangfeng Wu (ISCAS, 2025)

A 16-bit 1-MS/s SAR ADC With Capacitor Mismatch Self-Calibration. - Jie Ding; Fuming Liu; Kuan Deng; Zihan Zheng; Jingnan Zheng; Yongzhen Chen; Jiangfeng Wu (IEEE Trans. Very Large Scale Integr. Syst., 2025)

An Area-Efficient High-Precision Analog Front End for Battery Management System. - Kuan Deng; Jie Ding; Jingnan Zheng; Yongzhen Chen; Jiangfeng Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

Noisy image segmentation utilizing entropy-adaptive fractional differential-driven active contours. - Shang Zhuge; Zhiheng Zhou 001; Wenlue Zhou; Jiangfeng Wu; Ming Deng; Ming Dai (Multim. Tools Appl., 2025)