A design of subthreshold SRAM cell based on RSCE and RNCE. - Jiangzheng Cai; Jia Yuan; Liming Chen 007; Yong Hei (ASICON, 2015)

A PMOS read-port 8T SRAM cell with optimized leakage power and enhanced performance. - Jiangzheng Cai; Jia Yuan; Liming Chen 007; Chengying Chen; Yong Hei (IEICE Electron. Express, 2017)

A Low-Voltage SRAM Sense Amplifier With Offset Cancelling Using Digitized Multiple Body Biasing. - Bingyan Liu; Jiangzheng Cai; Jia Yuan; Yong Hei (IEEE Trans. Circuits Syst. II Express Briefs, 2017)