A Programmable CNN Architecture and Its Hardware-Software Co-design Approach for Image Processing and Stimulating Visual Illusions. - Jianwei Zheng 002; Chunhang Xu; Donghui Guo (QRS Companion, 2016)

Enhanced pipelined architecture of H.264/AVC intra prediction. - Jiefeng Guo; Zhixin Yang; Jianwei Zheng 002; Donghui Guo (Signal Process. Image Commun., 2016)

A Hardware-Efficient Block Matching Algorithm and Its Hardware Design for Variable Block Size Motion Estimation in Ultra-High-Definition Video Encoding. - Jianwei Zheng 002; Chao Lu 005; Jiefeng Guo; Deming Chen; Donghui Guo (ACM Trans. Design Autom. Electr. Syst., 2019)

Improving the Generalization Ability of Deep Neural Networks for Cross-Domain Visual Recognition. - Jianwei Zheng 002; Chao Lu 005; Cong Hao; Deming Chen; Donghui Guo (IEEE Trans. Cogn. Dev. Syst., 2021)

ReAAP: A Reconfigurable and Algorithm-Oriented Array Processor With Compiler-Architecture Co-Design. - Jianwei Zheng 002; Yu Liu 007; Xuejiao Liu; Luhong Liang; Deming Chen; Kwang-Ting Cheng (IEEE Trans. Computers, 2022)