A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects. - Nan Qi; Yuhang Kang; Qipeng Lin; Jianxu Ma; Jingbo Shi; Bozhi Yin; Chang Liu; Rui Bai 001; Shang Hu; Juncheng Wang; Jiangbing Du; Lin Ma 008; et al. (A-SSCC, 2017)

A Fully-Integrated 25Gb/s Low-Noise TIA+CDR Optical Receiver designed in 40nm-CMOS. - Juncheng Wang; Xuefeng Chen 004; Shang Hu; Yaxin Cai; Rui Bai 001; Xin Wang 130; Yuanxi Zhang; Shenglong Zhuo; Chang Liu; Bozhi Yin; Jianxu Ma; Hao Yan; et al. (A-SSCC, 2018)

A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS. - Juncheng Wang; Quan Pan 002; Yajie Qin; Xuefeng Chen 004; Shang Hu; Rui Bai 001; Xin Wang 130; Yaxin Cai; Tao Xia; Yuanxi Zhang; Jianxu Ma; Nan Qi; et al. (IEEE Trans. Circuits Syst. II Express Briefs, 2019)