MABNet: A Lightweight Stereo Network Based on Multibranch Adjustable Bottleneck Module. - Jiabin Xing; Zhi Qi; Jiying Dong; Jiaxuan Cai; Hao Liu 013 (ECCV (28), 2020)

PBCStereo: A Compressed Stereo Network with Pure Binary Convolutional Operations. - Jiaxuan Cai; Zhi Qi; Keqi Fu; Xulong Shi; Zan Li 005; Xuanyu Liu; Hao Liu (ACCV (3), 2022)

Towards High Performance and Accurate BNN Inference on FPGA with Structured Fine-Grained Pruning. - Keqi Fu; Zhi Qi; Jiaxuan Cai; Xulong Shi (ICCAD, 2022)

RepBNN: towards a precise Binary Neural Network with Enhanced Feature Map via Repeating. - Xulong Shi; Zhi Qi; Jiaxuan Cai; Keqi Fu; Yaru Zhao; Zan Li 005; Xuanyu Liu; Hao Liu (CoRR, 2022)

Low-Complexity Parallel Min-Sum Medium-Density Parity-Check Decoder for McEliece Cryptosystem. - Jiaxuan Cai; Xinmiao Zhang 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Low-Complexity Integer Divider Architecture for Homomorphic Encryption. - Sajjad Akherati; Jiaxuan Cai; Xinmiao Zhang 001 (SiPS, 2024)

Low-Latency Parallel Row-Layered Min-sum MDPC Decoder for McEliece Cryptosystem. - Jiaxuan Cai; Xinmiao Zhang 001 (SiPS, 2024)

Highly Efficient Parallel Row-Layered Min-Sum MDPC Decoder for McEliece Cryptosystem. - Jiaxuan Cai; Xinmiao Zhang 001 (CoRR, 2024)

Efficient Layered New Bit-Flipping QC-MDPC Decoder for BIKE Post-Quantum Cryptography. - Jiaxuan Cai; Xinmiao Zhang 001 (ISCAS, 2025)

Low-Complexity Linear Feedback Shift Register Architecture For CRC En/Decoding. - Yok Jye Tang; Jiaxuan Cai; Xinmiao Zhang 001 (ISCAS, 2025)