A 14-bit 1-GS/s SiGe Bootstrap Sampler for High Resolution ADC with 250-MHz Input. - Jiazhang Song; Li-Yang Chen; Mau-Chung Frank Chang; Sudhakar Pamarti; Chih-Kong Ken Yang (ISCAS, 2022)

A Sub-Sampling 35GHz PLL in 45nm PDSOI BiCMOS with 37fs Integrated Jitter and a FoM of -252dB. - Christopher Chen; Yan Zhang 050; Hao-Yu Chien; Jiazhang Song; Jia Zhou; Chao-Jen Tien; Sudhakar Pamarti; Chih-Kong Ken Yang; Mau-Chung Frank Chang (BCICTS, 2024)