An inductive wireless telemetry circuit with OOK modulation for implantable cardiac pacemakers. - Chong Guo; Hong Zhang 009; Zhouyi Ma; Jie Zhang 039; Jie Lin; Ruizhi Zhang 002 (ASICON, 2015)

A mixed-signal ASIC for triple-chamber cardiac pacemakers with heart resistance measurement. - Jie Zhang 039; Hong Zhang 009; Ruizhi Zhang 002; Jiangtao Xu; Yang Zhao 007; Mudan Zhang; Jia Li (A-SSCC, 2015)

A low energy ASIC for triple-chamber cardiac pacemakers with contact resistance measurement. - Jie Zhang 039; Hong Zhang 009; Jiangtao Xu; Yang Zhao 007; Jia Li; Guoyu Hu; Jialu Wang; Ruizhi Zhang 002; Yong Lian 001 (Microelectron. J., 2017)

A Low-Noise, Low-Power Amplifier With Current-Reused OTA for ECG Recordings. - Jie Zhang 039; Hong Zhang 009; Quan Sun; Ruizhi Zhang 002 (IEEE Trans. Biomed. Circuits Syst., 2018)

A Nano-Watt MOS-Only Voltage Reference With High-Slope PTAT Voltage Generators. - Hong Zhang 009; Xipeng Liu; Jie Zhang 039; Hongshuai Zhang; Jijun Li; Ruizhi Zhang 002; Shuai Chen; Anthony Chan Carusone (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A Low-Power Pipelined-SAR ADC Using Boosted Bucket-Brigade Device for Residue Charge Processing. - Hong Zhang 009; Junqiang Sun; Jie Zhang 039; Ruizhi Zhang 002; Anthony Chan Carusone (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Joint background calibration of gain and timing mismatch errors with low hardware cost for time-interleaved ADCs. - Jie Zhang 039; Hong Zhang 009; Bo Yang; Ruizhi Zhang 002 (IET Circuits Devices Syst., 2019)

A 12-Cell Battery Monitor IC with 2-Channel 16-bit ADCs and Isolated Bidirectional Data Interface. - Quan Sun; Long Zhang; Xiaofei Wang; Jie Zhang 039; Hong Zhang 009 (ICTA, 2020)

A Douglas-Peucker Algorithm Combining Node Importance and Radial Distance Constraints. - Xiaofei Wang; Jie Zhang 039; Lei You (AIAM (ACM), 2021)

A 1st-Order Passive Noise-Shaping SAR ADC with Improved NTF Assisted by Comparator Gain Calibration. - Hanrui Zhang 007; Nannan Li; Zihao Jiao; Jie Zhang 039; Xiaofei Wang; Hong Zhang 009 (ISCAS, 2021)

Linearity Boosting Technique with Adaptive Sampling Switch Assisted by Signal Prediction for Multi-Channel ADCs in Standard CMOS Process. - Zihao Jiao; Xiaofei Wang; Hongrui Luo; Jie Zhang 039; Ruizhi Zhang 002; Hong Zhang 009 (NorCAS, 2021)

A 6-GHz Bandwidth Input Buffer Based on AC-Coupled Flipped Source Follower for 12-bit 8-GS/s ADC in 28-nm CMOS. - Zhengbo Huang; Jie Zhang 039; Yuanjun Cen; Juan Wei; Qiang Yu; Jinda Yang; Hong Zhang 009 (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

An Analog Readout Circuit With a Noise-Reduction Input Buffer for MEMS Microphone. - Zhiming Li; Lei Dong; Hao Li; Jie Zhang 039; Xiaofei Wang; Hong Zhang 009 (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 2.5-MHz BW, 75-dB SNDR Noise-Shaping SAR ADC With a 1st-Order Hybrid EF-CIFF Structure Assisted by Unity-Gain Buffer. - Hanrui Zhang 007; Xiaofei Wang; Nannan Li; Zihao Jiao; Liang Chen; Di Mu; Jie Zhang 039; Hong Zhang 009 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

An 84dB-SNDR 1-0 Quasi-MASH NS SAR with LSB Repeating and 12-bit Bridge-Crossing Segmented CDAC. - Zihao Jiao; Hongrui Luo; Jie Zhang 039; Xiaofei Wang; Liang Chen; Hong Zhang 009 (CICC, 2023)

A 9 b 4 GS/s Time-Domain ADC with Self-Reset VTC and Switched-RO TDC Including 8x Hybrid Interpolation. - Nannan Li; Zhengbo Huang; Jie Zhang 039; Quan Sun; Jian Luo; Xiaofei Wang (ICTA, 2023)

A 1.25-MHz-BW, 83-dB SNDR Pipelined Noise-Shaping SAR ADC With MASH 2-2 Structure and kT/C Noise Cancellation. - Hanrui Zhang 007; Nannan Li; Jinfu Wang; Zihao Jiao; Jie Zhang 039; Xiaofei Wang; Hong Zhang 009 (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A 1.5MSPS, 120 dB SFDR, ±10 V input range SAR ADC with sampling nonlinearity compensation and inherent 2-b coarse ADC for MSBs decision. - Hongrui Luo; Zihao Jiao; Yang Chen 046; Jie Zhang 039; Quan Sun; Xiaofei Wang; Hong Zhang 009 (Microelectron. J., 2024)

A 10-kHz BW 104.3-dB DR discrete-time delta-sigma modulator with ring-amplifier-based integrator. - Yuming Li; Shuai Peng; Weiliang Peng; Yang Chen 046; Zhiming Li; Jie Zhang 039; Xiaofei Wang; Hong Zhang 009 (Microelectron. J., 2024)

Artificial Neural Network Based Calibration for a 12 b 250 MS/s Pipelined-SAR ADC With Ring Amplifier in 40-nm CMOS. - Bin Liu 068; Nannan Li; Xuhui Chen; Zhichao Dai; Yufeng Ge; Zheng Jiang; Huanhuan Qi; Jie Zhang 039; Jinfu Wang; Xiaofei Wang; Zhenhai Chen; Yan Xue; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A 107.5-dB dynamic range 402-μW event-driven dynamic zoom ADC with voice activity detection function for audio applications. - Zhiming Li; Lei Dong; Quan Sun; Yang Chen 046; Yuming Li; Jie Zhang 039; Huanhuan Qi; Xiaofei Wang; Hong Zhang 009 (Microelectron. J., 2025)

A 10-Bit 500-MS/s Pipelined SAR ADC With Nonlinearity-Compensated Open-Loop Amplifier and Parallel Conversion Through Comparator Reusing. - Nannan Li; Hanrui Zhang 007; Bin Liu 068; Lei Pei; Jinfu Wang; Huanhuan Qi; Jie Zhang 039; Xiaofei Wang; Hong Zhang 009 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)