COMBA: A comprehensive model-based analysis framework for high level synthesis of real applications. - Jieru Zhao; Liang Feng 001; Sharad Sinha; Wei Zhang 012; Yun Liang 001; Bingsheng He (ICCAD, 2017)

Hi-DMM: High-Performance Dynamic Memory Management in High-Level Synthesis. - Tingyuan Liang; Jieru Zhao; Liang Feng 001; Sharad Sinha; Wei Zhang 012 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

LAMA: Link-Aware Hybrid Management for Memory Accesses in Emerging CPU-FPGA Platforms. - Liang Feng 001; Jieru Zhao; Tingyuan Liang; Sharad Sinha; Wei Zhang 012 (DAC, 2019)

Machine Learning Based Routing Congestion Prediction in FPGA High-Level Synthesis. - Jieru Zhao; Tingyuan Liang; Sharad Sinha; Wei Zhang 012 (DATE, 2019)

A Hybrid Data-Consistent Framework for Link-Aware AccessManagement in Emerging CPU-FPGA Platforms. - Liang Feng 001; Jieru Zhao; Tingyuan Liang; Sharad Sinha; Wei Zhang 012 (FPGA, 2019)

Hi-ClockFlow: Multi-Clock Dataflow Automation and Throughput Optimization in High-Level Synthesis. - Tingyuan Liang; Jieru Zhao; Liang Feng 001; Sharad Sinha; Wei Zhang 012 (ICCAD, 2019)

HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis. - Zhe Lin 007; Jieru Zhao; Sharad Sinha; Wei Zhang 012 (ASP-DAC, 2020)

FP-Stereo: Hardware-Efficient Stereo Vision for Embedded Applications. - Jieru Zhao; Tingyuan Liang; Liang Feng 001; Wenchao Ding 001; Sharad Sinha; Wei Zhang 012; Shaojie Shen (FPL, 2020)

Performance Modeling and Directives Optimization for High-Level Synthesis on FPGA. - Jieru Zhao; Liang Feng 001; Sharad Sinha; Wei Zhang 012; Yun Liang 001; Bingsheng He (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

AMF-Placer: High-Performance Analytical Mixed-size Placer for FPGA. - Tingyuan Liang; Gengjie Chen; Jieru Zhao; Sharad Sinha; Wei Zhang 012 (ICCAD, 2021)

Exploiting Intra-SM Parallelism in GPUs via Persistent and Elastic Blocks. - Han Zhao 005; Weihao Cui; Quan Chen 002; Jieru Zhao; Jingwen Leng; Minyi Guo (ICCD, 2021)

Enable simultaneous DNN services based on deterministic operator overlap and precise latency prediction. - Weihao Cui; Han Zhao 005; Quan Chen 002; Ningxin Zheng; Jingwen Leng; Jieru Zhao; Zhuo Song; Tao Ma 006; Yong Yang; Chao Li 009; Minyi Guo (SC, 2021)

Characterizing and orchestrating VM reservation in geo-distributed clouds to improve the resource efficiency. - Jiuchen Shi; Kaihua Fu; Quan Chen 002; Changpeng Yang; Pengfei Huang; Mosong Zhou; Jieru Zhao; Chen Chen 067; Minyi Guo (SoCC, 2022)

SALO: an efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences. - Guan Shen; Jieru Zhao; Quan Chen 002; Jingwen Leng; Chao Li 009; Minyi Guo (DAC, 2022)

PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs. - Zhe Lin 007; Zike Yuan; Jieru Zhao; Wei Zhang 012; Hui Wang 030; Yonghong Tian 001 (DATE, 2022)

CSC: Collaborative System Configuration for I/O-Intensive Applications in Multi-Tenant Clouds. - Haowei Huang; Pu Pang; Quan Chen 002; Jieru Zhao; Wenli Zheng; Minyi Guo (IPDPS, 2022)

DataFlower: Exploiting the Data-flow Paradigm for Serverless Workflow Orchestration. - Zijun Li 001; Chuhao Xu; Quan Chen 002; Jieru Zhao; Chen Chen 067; Minyi Guo (ASPLOS (4), 2023)

MARS: Exploiting Multi-Level Parallelism for DNN Workloads on Adaptive Multi-Accelerator Systems. - Guan Shen; Jieru Zhao; Zeke Wang; Zhe Lin 007; Wenchao Ding 001; Chentao Wu; Quan Chen 002; Minyi Guo (DAC, 2023)

SpMMPlu: A Compiler Plug-in with Sparse IR for Efficient Sparse Matrix Multiplication. - Tao Yang 031; Yiyuan Zhou; Qidong Tang; Feng Xu; Hui Ma; Jieru Zhao; Li Jiang 002 (DAC, 2023)

SSiMD: Supporting Six Signed Multiplications in a DSP Block for Low-Precision CNN on FPGAs. - Qi Liu; Mo Sun 001; Jie Sun 017; Liqiang Lu; Jieru Zhao; Zeke Wang (ICFPT, 2023)

Skadi: Building a Distributed Runtime for Data Systems in Disaggregated Data Centers. - Cunchen Hu; Chenxi Wang; Sa Wang; Ninghui Sun; Yungang Bao; Jieru Zhao; Sanidhya Kashyap; Pengfei Zuo; Xusheng Chen; Liangliang Xu; Qin Zhang; Hao Feng; et al. (HotOS, 2023)

FlowMap: Path Generation for Automated Vehicles in Open Space Using Traffic Flow. - Wenchao Ding 001; Jieru Zhao; Yubin Chu; Haihui Huang; Tong Qin 001; Chunjing Xu; Yuxiang Guan; Zhongxue Gan (ICRA, 2023)

PAC: Preference-Aware Co-location Scheduling on Heterogeneous NUMA Architectures To Improve Resource Utilization. - Pu Pang; Yaoxuan Li; Bo Liu; Quan Chen 002; Zhou Yu 003; Zhibin Yu 001; Deze Zeng; Jingwen Leng; Jieru Zhao; Minyi Guo (ICS, 2023)

FPGA sharing in the cloud: a comprehensive analysis. - Jinyang Guo; Lu Zhang 049; José Romero Hung; Chao Li 009; Jieru Zhao; Minyi Guo (Frontiers Comput. Sci., 2023)

HL-Pow: Learning-Assisted Pre-RTL Power Modeling and Optimization for FPGA HLS. - Zhe Lin 007; Tingyuan Liang; Jieru Zhao; Sharad Sinha; Wei Zhang 012 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Swift-Mapping: Online Neural Implicit Dense Mapping in Urban Scenes. - Ke Wu; Kaizhao Zhang; Mingzhe Gao; Jieru Zhao; Zhongxue Gan; Wenchao Ding 001 (AAAI, 2024)

Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs. - Mingzhe Gao; Jieru Zhao; Zhe Lin 007; Minyi Guo (DATE, 2024)

O 2V-Mapping: Online Open-Vocabulary Mapping with Neural Implicit Representation. - Muer Tie; Julong Wei; Ke Wu; Zhengjun Wang; Shanshuai Yuan; Kaizhao Zhang; Jie Jia; Jieru Zhao; Zhongxue Gan; Wenchao Ding 001 (ECCV (87), 2024)

An Optimizing Framework on MLIR for Efficient FPGA-based Accelerator Generation. - Weichuang Zhang; Jieru Zhao; Guan Shen; Quan Chen 002; Chen Chen 067; Minyi Guo (HPCA, 2024)

AutoVCoder: A Systematic Framework for Automated Verilog Code Generation using LLMs. - Mingzhe Gao; Jieru Zhao; Zhe Lin 007; Wenchao Ding 001; Xiaofeng Hou; Yu Feng 007; Chao Li 009; Minyi Guo (ICCD, 2024)

A Tale of Two Domains: Exploring Efficient Architecture Design for Truly Autonomous Things. - Xiaofeng Hou; Tongqiao Xu; Chao Li 009; Cheng Xu; Jiacheng Liu 001; Yang Hu 001; Jieru Zhao; Jingwen Leng; Kwang-Ting Cheng; Minyi Guo (ISCA, 2024)

PAS: Towards Accurate and Efficient Federated Learning with Parameter-Adaptive Synchronization. - Zuo Gan; Chen Chen 067; Jiayi Zhang 006; Gaoxiong Zeng; Yifei Zhu 001; Jieru Zhao; Quan Chen 002; Minyi Guo (IWQoS, 2024)

HGS-Mapping: Online Dense Mapping Using Hybrid Gaussian Representation in Urban Scenes. - Ke Wu; Kaizhao Zhang; Zhiwei Zhang; Shanshuai Yuan; Muer Tie; Julong Wei; Zijun Xu; Jieru Zhao; Zhongxue Gan; Wenchao Ding 001 (CoRR, 2024)

O2V-Mapping: Online Open-Vocabulary Mapping with Neural Implicit Representation. - Muer Tie; Julong Wei; Zhengjun Wang; Ke Wu; Shansuai Yuan; Kaizhao Zhang; Jie Jia; Jieru Zhao; Zhongxue Gan; Wenchao Ding 001 (CoRR, 2024)

The CAP Principle for LLM Serving: A Survey of Long-Context Large Language Model Serving. - Pai Zeng; Zhenyu Ning; Jieru Zhao; Weihao Cui; Mengwei Xu; Liwei Guo; Xusheng Chen; Yizhou Shan (CoRR, 2024)

Inf-MLLM: Efficient Streaming Inference of Multimodal Large Language Models on a Single GPU. - Zhenyu Ning; Jieru Zhao; Qihao Jin; Wenchao Ding 001; Minyi Guo (CoRR, 2024)

HGS-Planner: Hierarchical Planning Framework for Active Scene Reconstruction Using 3D Gaussian Splatting. - Zijun Xu; Rui Jin; Ke Wu; Yi Zhao; Zhiwei Zhang; Jieru Zhao; Fei Gao 011; Zhongxue Gan; Wenchao Ding 001 (CoRR, 2024)

SparseTem: Boosting the Efficiency of CNN-Based Video Encoders by Exploiting Temporal Continuity. - Kunyun Wang; Jieru Zhao; Shuo Yang; Wenchao Ding 001; Minyi Guo (CoRR, 2024)

RPCAcc: A High-Performance and Reconfigurable PCIe-attached RPC Accelerator. - Jie Zhang 081; Hongjing Huang; Xuzheng Xu; Xiang Li; Jieru Zhao; Ming Liu 027; Zeke Wang (CoRR, 2024)

ClusterKV: Manipulating LLM KV Cache in Semantic Space for Recallable Compression. - Guangda Liu; Chengwei Li; Jieru Zhao; Chenqi Zhang; Minyi Guo (CoRR, 2024)

AMF-Placer 2.0: Open-Source Timing-Driven Analytical Mixed-Size Placer for Large-Scale Heterogeneous FPGA. - Tingyuan Liang; Gengjie Chen; Jieru Zhao; Sharad Sinha; Wei Zhang 012 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Hardware-Software Co-Design Enabling Static and Dynamic Sparse Attention Mechanisms. - Jieru Zhao; Pai Zeng; Guan Shen; Quan Chen 002; Minyi Guo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

FADO: Floorplan-Aware Directive Optimization Based on Synthesis and Analytical Models for High-Level Synthesis Designs on Multi-Die FPGAs. - Linfeng Du; Tingyuan Liang; Xiaofeng Zhou; Jinming Ge; Shangkun Li; Sharad Sinha; Jieru Zhao; Zhiyao Xie; Wei Zhang 012 (ACM Trans. Reconfigurable Technol. Syst., 2024)

HGS-Mapping: Online Dense Mapping Using Hybrid Gaussian Representation in Urban Scenes. - Ke Wu; Kaizhao Zhang; Zhiwei Zhang; Muer Tie; Shanshuai Yuan; Jieru Zhao; Zhongxue Gan; Wenchao Ding 001 (IEEE Robotics Autom. Lett., 2024)

Potamoi: Accelerating Neural Rendering via a Unified Streaming Architecture. - Yu Feng 007; Weikai Lin; Zihan Liu 002; Jingwen Leng; Minyi Guo; Han Zhao 005; Xiaofeng Hou; Jieru Zhao; Yuhao Zhu 001 (ACM Trans. Archit. Code Optim., 2024)

Automatic Mapping of Heterogeneous DNN Models on Adaptive Multiaccelerator Systems. - Jieru Zhao; Guan Shen; Wenchao Ding 001; Quan Chen 002; Minyi Guo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

FiberFlex: Real-time FPGA-based Intelligent and Distributed Fiber Sensor System for Pedestrian Recognition. - Yuqi Li; Kehao Zhao; Jieru Zhao; Qirui Wang; Shuda Zhong; Nageswara Lalam; Ruishu F. Wright; Peipei Zhou 001; Kevin P. Chen (ACM Trans. Reconfigurable Technol. Syst., 2024)

StreamGrid: Streaming Point Cloud Analytics via Compulsory Splitting and Deterministic Termination. - Yu Feng 007; Zheng Liu; Weikai Lin; Zihan Liu 002; Jingwen Leng; Minyi Guo; Zhezhi He; Jieru Zhao; Yuhao Zhu 001 (ASPLOS (2), 2025)

RpcNIC: Enabling Efficient Datacenter RPC Offloading on PCIe-attached SmartNICs. - Jie Zhang 081; Hongjing Huang; Xuzheng Chen; Xiang Li; Jieru Zhao; Ming Liu 027; Zeke Wang (HPCA, 2025)

DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysis. - Zeju Li; Changran Xu; Zhengyuan Shi; Zedong Peng; Yi Liu; Yunhao Zhou; Lingfeng Zhou; Chengyu Ma; Jianyuan Zhong; Xi Wang; Jieru Zhao; Zhufei Chu; et al. (CoRR, 2025)

FreeKV: Boosting KV Cache Retrieval for Efficient LLM Inference. - Guangda Liu; Chengwei Li; Zhenyu Ning; Jing Lin; Yiwu Yao; Danning Ke; Minyi Guo; Jieru Zhao (CoRR, 2025)

Communication-Efficient Diffusion Denoising Parallelization via Reuse-then-Predict Mechanism. - Kunyun Wang; Bohan Li 003; Kai Yu 004; Minyi Guo; Jieru Zhao (CoRR, 2025)

LiveVLM: Efficient Online Video Understanding via Streaming-Oriented KV Cache and Retrieval. - Zhenyu Ning; Guangda Liu; Qihao Jin; Wenchao Ding 001; Minyi Guo; Jieru Zhao (CoRR, 2025)

STREAMINGGS: Voxel-Based Streaming 3D Gaussian Splatting with Memory Optimization and Architectural Support. - Chenqi Zhang; Yu Feng 007; Jieru Zhao; Guangda Liu; Wenchao Ding 001; Chentao Wu; Minyi Guo (CoRR, 2025)

Efficient Unified Caching for Accelerating Heterogeneous AI Workloads. - Tianze Wang; Yifei Liu; Chen Chen 067; Pengfei Zuo; Jiawei Zhang; Qizhen Weng; Yin Chen; Zhenhua Han; Jieru Zhao; Quan Chen 002; Minyi Guo (CoRR, 2025)

ChatHLS: Towards Systematic Design Automation and Optimization for High-Level Synthesis. - Runkai Li; Jia Xiong; Xiuyuan He; Jieru Zhao; Qiang Xu 001; Xi Wang (CoRR, 2025)

RapidStore: An Efficient Dynamic Graph Storage System for Concurrent Queries. - Chiyu Hao; Jixian Su; Shixuan Sun; Hao Zhang 098; Sen Gao; Jianwen Zhao; Chenyi Zhang 002; Jieru Zhao; Chen Chen 067; Minyi Guo (CoRR, 2025)

ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis. - Zedong Peng; Zeju Li; Mingzhe Gao; Qiang Xu 001; Chen Zhang 001; Jieru Zhao (CoRR, 2025)

SLTarch: Towards Scalable Point-Based Neural Rendering by Taming Workload Imbalance and Memory Irregularity. - Xingyang Li; Jie Jiang; Yu Feng 007; Yiming Gan; Jieru Zhao; Zihan Liu 002; Jingwen Leng; Minyi Guo (CoRR, 2025)