Design and Implementation of the Accumulating Algorithm of Digital Signal Averager. - Jietao Diao; Qingjiang Li; Wei Yi; Meng Wang; Haijun Liu 003; Hongqi Yu; Zhaolin Sun; Xin Xu (ICDMA, 2011)

High Accuracy Biological Impedance Measurement System Design and Calibration. - Jietao Diao; Zhou Zhou; Nan Li 020; Hongshan Nie; Hongqi Yu; Hui Xu 010 (ICDMA, 2012)

Minimax design and order estimation of FIR filters for extending the bandwidth of ADCs. - Yinan Wang; Håkan Johansson; Hui Xu 010; Jietao Diao (ISCAS, 2016)

Hardware-Efficient Parallel FIR Filter Structure Based on Modified Cook-Toom Algorithm. - Qiaoyu Tian; Yinan Wang; Guiqing Liu; Xiangyu Liu; Jietao Diao; Hui Xu 010 (APCCAS, 2018)

A new multitime programmable non-volatile memory cell using high voltage NMOS. - Shunqiang Xu; Hongyi Wang 003; Jianfei Wu; Liming Zheng; Jietao Diao (Microelectron. Reliab., 2018)

Joint Allocation on Communication and Computing Resources for Fog Radio Access Networks. - Yingteng Ma; Haijun Wang 003; Jun Xiong 002; Jietao Diao; Dongtang Ma (IEEE Access, 2020)

Implication of unsafe writing on the MAGIC NOR gate. - Xi Zhu; Hongchang Long; Zhiwei Li 008; Jietao Diao; Haijun Liu 003; Nan Li 020; Hui Xu 010 (Microelectron. J., 2020)

Random time delay analysis of Nb2O5 and OTS memristors. - Zhong Ma; Hongqi Yu; Shiqing Zhang; Yi Sun; Jietao Diao; David Day-Uei Li (ICISCAE (IEEE), 2021)

Logic Implementation Based on Double Memristors. - Hongchang Long; Jietao Diao; Xi Zhu; Zhiwei Li 008; Haijun Liu 003 (ISCAS, 2021)

Binary Memristive Synapse Based Vector Neural Network Architecture and Its Application. - Haijun Liu 003; Shengyang Sun; Jianjun Liu; Qingjiang Li; Jietao Diao; Zhiwei Li 008 (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

FPGA hardware implementation of Q-learning algorithm with low resource consumption. - Xiaojuan Liu; Jietao Diao; Nan Li 020 (PRIS, 2022)