Approximate Adder Tree Design with Sparsity-Aware Encoding and In-Memory Swapping for SRAM-based Digital Compute-In-Memory Macros. - Ming-Guang Lin; Jiing-Ping Wang; Cheng-Yang Chang; An-Yeu Andy Wu (AICAS, 2024)

LATTE: Low-Precision Approximate Attention with Head-wise Trainable Threshold for Efficient Transformer. - Jiing-Ping Wang; Ming-Guang Lin; An-Yeu Andy Wu (AICAS, 2024)

A 28nm 64.5TOPS/W Sparse Transformer Accelerator with Partial Product-based Speculation and Sparsity-Adaptive Computation. - Ming-Guang Lin; Jiing-Ping Wang; Yuan-June Luo; An-Yeu Andy Wu (APCCAS, 2024)