Efficient verification of IP watermarks in FPGA designs through lookup table content extracting. - Jiliang Zhang 002; Yaping Lin; Wenjie Che; Qiang Wu; Yongqiang Lu 001; Kang Zhao (IEICE Electron. Express, 2012)

TimFastPlace: Critical-path based timing driven FastPlace. - Jiliang Zhang 002; Yongqiang Lu 001; Qiang Zhou 001; Qiang Wu; Yaping Lin; Kang Zhao (IEICE Electron. Express, 2012)

Design and Implementation of a Delay-Based PUF for FPGA IP Protection. - Jiliang Zhang 002; Qiang Wu; Yongqiang Lyu 001; Qiang Zhou 001; Yici Cai; Yaping Lin; Gang Qu 001 (CAD/Graphics, 2013)

Binding Hardware IPs to Specific FPGA Device via Inter-twining the PUF Response with the FSM of Sequential Circuits. - Jiliang Zhang 002; Yaping Lin; Yongqiang Lu 001; Ray C. C. Cheung; Wenjie Che; Qiang Zhou 001; Jinian Bian (FCCM, 2013)

FPGA IP protection by binding Finite State Machine to Physical Unclonable Function. - Jiliang Zhang 002; Yaping Lin; Yongqiang Lyu 001; Gang Qu 001; Ray C. C. Cheung; Wenjie Che; Qiang Zhou 001; Jinian Bian (FPL, 2013)

Improving the reliability of RO PUF using frequency offset. - Bin Tang; Yaping Lin; Jiliang Zhang 002 (FPT, 2014)

A survey on security and trust of FPGA-based systems. - Jiliang Zhang 002; Gang Qu 001 (FPT, 2014)

A Survey on Silicon PUFs and Recent Advances in Ring Oscillator PUFs. - Jiliang Zhang 002; Gang Qu 001; Yong-Qiang Lv 001; Qiang Zhou 001 (J. Comput. Sci. Technol., 2014)

Reliable and Anti-cloning PUFs Based on Configurable Ring Oscillators. - Mingze Gao; Khai Lai; Jiliang Zhang 002; Gang Qu 001; Aijiao Cui; Qiang Zhou 001 (CAD/Graphics, 2015)

A Survey of Hardware Trojan Detection, Diagnosis and Prevention. - He Li 008; Qiang Liu 011; Jiliang Zhang 002; Yongqiang Lyu 001 (CAD/Graphics, 2015)

Application of Linear Predictive Coding for Doppler Through-Wall Radar Target Tracking. - Yipeng Ding; Jingtian Tang; Xuemei Xu; Jiliang Zhang 002 (IEEE Geosci. Remote. Sens. Lett., 2015)

A PUF-FSM Binding Scheme for FPGA IP Protection and Pay-Per-Device Licensing. - Jiliang Zhang 002; Yaping Lin; Yongqiang Lyu 001; Gang Qu 001 (IEEE Trans. Inf. Forensics Secur., 2015)

Reconfigurable Binding against FPGA Replay Attacks. - Jiliang Zhang 002; Yaping Lin; Gang Qu 001 (ACM Trans. Design Autom. Electr. Syst., 2015)

Physical unclonable functions-based linear encryption against code reuse attacks. - Pengfei Qiu; Yongqiang Lyu 001; Jiliang Zhang 002; Xingwei Wang 001; Di Zhai; Dongsheng Wang 002; Gang Qu 001 (DAC, 2016)

Combinational Logic Binding for FPGA System Security. - Jiliang Zhang 002 (Trustcom/BigDataSE/ISPA, 2016)

A survey of hardware Trojan threat and defense. - He Li 008; Qiang Liu 011; Jiliang Zhang 002 (Integr., 2016)

Techniques for Design and Implementation of an FPGA-Specific Physical Unclonable Function. - Jiliang Zhang 002; Qiang Wu; Yipeng Ding; Yong-Qiang Lv 001; Qiang Zhou 001; Zhihua Xia; Xingming Sun; Xing-Wei Wang 001 (J. Comput. Sci. Technol., 2016)

A new zero value attack combined fault sensitivity analysis on masked AES. - Qian Wang 022; An Wang 001; Liji Wu; Jiliang Zhang 002 (Microprocess. Microsystems, 2016)

Rebuttal to "Comments on 'A PUF-FSM Binding Scheme for FPGA IP Protection and Pay-Per-Device Licensing"'. - Jiliang Zhang 002; Gang Qu 001 (IEEE Trans. Inf. Forensics Secur., 2016)

A Practical Logic Obfuscation Technique for Hardware Security. - Jiliang Zhang 002 (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Crossover Ring Oscillator PUF. - Zihan Pang; Jiliang Zhang 002; Qiang Zhou 001; Shuqian Gong; Xu Qian; Bin Tang (ISQED, 2017)

Enhancing Security of FPGA-Based Embedded Systems with Combinational Logic Binding. - Jiliang Zhang 002; Weizheng Wang; Xing-Wei Wang 001; Zhihua Xia (J. Comput. Sci. Technol., 2017)

Publicly Verifiable Watermarking for Intellectual Property Protection in FPGA Design. - Jiliang Zhang 002; Lele Liu (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A High Capacity Spatial Domain Data Hiding Scheme for Medical Images. - Dongqi Wang 001; Dongming Chen; Ben Ma; Lisheng Xu; Jiliang Zhang 002 (J. Signal Process. Syst., 2017)

Machine Learning Attacks on Voltage Over-scaling-based Lightweight Authentication. - Haihan Su; Jiliang Zhang 002 (AsianHOST, 2018)

T2FA: Transparent Two-Factor Authentication. - Jiliang Zhang 002; Xiao Tan; Xiangqi Wang; Aibin Yan; Zheng Qin 001 (IEEE Access, 2018)

HCIC: Hardware-assisted Control-flow Integrity Checking. - Jiliang Zhang 002; Binhang Qi; Gang Qu 001 (CoRR, 2018)

CMOS: Dynamic Multi-key Obfuscation Structure for Strong PUFs. - Jiliang Zhang 002; Lu Wan (CoRR, 2018)

Machine Learning Attack and Defense on Voltage Over-scaling-based Lightweight Authentication. - Jiliang Zhang 002; Haihan Su (CoRR, 2018)

Crossover RO PUF-based Key Sharing for IoT Security. - Jiliang Zhang 002 (CoRR, 2018)

Adversarial Examples: Attacks on Machine Learning-based Malware Visualization Detection Methods. - Xinbo Liu; Yapin Lin; He Li 008; Jiliang Zhang 002 (CoRR, 2018)

Adversarial Examples: Opportunities and Challenges. - Jiliang Zhang 002; Xiaoxiong Jiang (CoRR, 2018)

Control Flow Integrity Based on Lightweight Encryption Architecture. - Pengfei Qiu; Yongqiang Lyu 001; Jiliang Zhang 002; Dongsheng Wang 002; Gang Qu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Frequency Offset-Based Ring Oscillator Physical Unclonable Function. - Jiliang Zhang 002; Xiao Tan; Yuanjing Zhang; Weizheng Wang; Zheng Qin 001 (IEEE Trans. Multi Scale Comput. Syst., 2018)

ATMPA: attacking machine learning-based malware visualization detection methods via adversarial examples. - Xinbo Liu; Jiliang Zhang 002; Yaping Lin; He Li 008 (IWQoS, 2019)

Adversarial Audio: A New Information Hiding Method and Backdoor for DNN-based Speech Recognition Models. - Yehao Kong; Jiliang Zhang 002 (CoRR, 2019)

DeepCheck: A Non-intrusive Control-flow Integrity Checking based on Deep Learning. - Jiliang Zhang 002; Wuqiao Chen; Yuqi Niu (CoRR, 2019)

HCIC: Hardware-Assisted Control-Flow Integrity Checking. - Jiliang Zhang 002; Binhang Qi; Zheng Qin 001; Gang Qu 001 (IEEE Internet Things J., 2019)

A Double-Node-Upset Self-Recoverable Latch Design for High Performance and Low Power Application. - Aibin Yan; Kang Yang; Zhengfeng Huang; Jiliang Zhang 002; Jie Cui 004; Xiangsheng Fang; Maoxiang Yi; Xiaoqing Wen (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Recent Attacks and Defenses on FPGA-based Systems. - Jiliang Zhang 002; Gang Qu 001 (ACM Trans. Reconfigurable Technol. Syst., 2019)

A Unified Formal Model for Proving Security and Reliability Properties. - Wei Hu 008; Lingjuan Wu; Yu Tai; Jing Tan; Jiliang Zhang 002 (ATS, 2020)

Survey: Hardware Trojan Detection for Netlist. - Yipei Yang; Jing Ye 001; Yuan Cao 003; Jiliang Zhang 002; Xiaowei Li 001; Huawei Li 001; Yu Hu 001 (ATS, 2020)

HRAE: Hardware-assisted Randomization against Adversarial Example Attacks. - Jiliang Zhang 002; Shuang Peng 010; Yupeng Hu; Fei Peng; Wei Hu 008; Jinmei Lai 001; Jing Ye 001; Xiangqi Wang (ATS, 2020)

Privacy Threats and Protection in Machine Learning. - Jiliang Zhang 002; Chen Li; Jing Ye 001; Gang Qu 001 (ACM Great Lakes Symposium on VLSI, 2020)

Prediction Stability: A New Metric for Quantitatively Evaluating DNN Outputs. - Qingli Guo; Jing Ye 001; Jiliang Zhang 002; Yu Hu 001; Xiaowei Li 001; Huawei Li 001 (ACM Great Lakes Symposium on VLSI, 2020)

Adversarial Audio: A New Information Hiding Method. - Yehao Kong; Jiliang Zhang 002 (INTERSPEECH, 2020)

CT PUF: Configurable Tristate PUF against Machine Learning Attacks. - Qiang Wu; Jiliang Zhang 002 (ISCAS, 2020)

Rethinking FPGA Security in the New Era of Artificial Intelligence. - Xiaolin Xu 001; Jiliang Zhang 002 (ISQED, 2020)

A novel method for malware detection on ML-based visualization technique. - Xinbo Liu; Yaping Lin; He Li 008; Jiliang Zhang 002 (Comput. Secur., 2020)

SIAT: A Systematic Inter-Component Communication Analysis Technology for Detecting Threats on Android. - Yupeng Hu; Zhe Jin; Wenjia Li; Yang Xiang 001; Jiliang Zhang 002 (CoRR, 2020)

Backdoor Attacks and Countermeasures on Deep Learning: A Comprehensive Review. - Yansong Gao 001; Bao Gia Doan; Zhi Zhang 001; Siqi Ma; Jiliang Zhang 002; Anmin Fu; Surya Nepal; Hyoungshick Kim (CoRR, 2020)

Approximation Attacks on Strong PUFs. - Junye Shi; Yang Lu; Jiliang Zhang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Physical Unclonable Function-Based Key Sharing via Machine Learning for IoT Security. - Jiliang Zhang 002; Gang Qu 001 (IEEE Trans. Ind. Electron., 2020)

Adversarial Examples: Opportunities and Challenges. - Jiliang Zhang 002; Chen Li (IEEE Trans. Neural Networks Learn. Syst., 2020)

Micro-architectural Cache Side-Channel Attacks and Countermeasures. - Chaoqun Shen; Congcong Chen; Jiliang Zhang 002 (ASP-DAC, 2021)

Unpaired Image-to-Image Translation Network for Semantic-based Face Adversarial Examples Generation. - Jiliang Zhang 002; Junjie Hou (ACM Great Lakes Symposium on VLSI, 2021)

Security Enhancements for Approximate Machine Learning. - He Li 008; Yaru Pang; Jiliang Zhang 002 (ACM Great Lakes Symposium on VLSI, 2021)

Set-Based Obfuscation for Strong PUFs Against Machine Learning Attacks. - Jiliang Zhang 002; Chaoqun Shen (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Adversarial Hardware With Functional and Topological Camouflage. - He Li 008; Ameer Abdelhadi; Runbin Shi; Jiliang Zhang 002; Qiang Liu 011 (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Lightweight and Secure Branch Predictors against Spectre Attacks. - Congcong Chen; Chaoqun Shen; Jiliang Zhang 002 (ASP-DAC, 2022)

DA PUF: dual-state analog PUF. - Jiliang Zhang 002; Lin Ding; Zhuojun Chen; Wenshang Li; Gang Qu 001 (DAC, 2022)

CT PUF: Configurable Tristate PUF Against Machine Learning Attacks for IoT Security. - Jiliang Zhang 002; Chaoqun Shen; Zhiyang Guo; Qiang Wu; Wanli Chang 001 (IEEE Internet Things J., 2022)

STT-MRAM-Based Reliable Weak PUF. - Yupeng Hu; Linjun Wu; Zhuojun Chen; Yun Huang; Xiaolin Xu 001; Keqin Li 001; Jiliang Zhang 002 (IEEE Trans. Computers, 2022)

Voltage Over-Scaling-Based Lightweight Authentication for IoT Security. - Jiliang Zhang 002; Chaoqun Shen; Haihan Su; Md Tanvir Arafin; Gang Qu 001 (IEEE Trans. Computers, 2022)

A Lightweight and Machine-Learning-Resistant PUF Using Obfuscation-Feedback-Shift-Register. - Zhuojun Chen; Wenshang Lee; Qinghui Hong; Chongyan Gu; Zhenyu Guan; Lin Ding; Jiliang Zhang 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

CRAlert: Hardware-Assisted Code Reuse Attack Detection. - Wenhao Wang 001; Guangyu Hu; Xiaolin Xu 001; Jiliang Zhang 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Processor based Intrinsic PUF Design for Approximate Computing: Faith or Reality? - Aditya Japa; Jiliang Zhang 002; Weiqiang Liu 001; Chongyan Gu (AsianHOST, 2023)

A Comparison Study of the Compatibility Approaches for SGX Enclaves. - Jinhua Cui 002; Yiyun Yin; Zhiping Cai; Jiliang Zhang 002 (ATS, 2023)

Message from the Chairs. - Huawei Li 001; Jing Ye 001; Wei Hu 008; Jiliang Zhang 002 (ATS, 2023)

A Survey on Fault-Tolerance Methods for SRAM-Based FPGAs in Radiation Environments. - Zhaojun Lu; Qi Zhao; Qidong Chen; Jiliang Zhang 002 (ATS, 2023)

PIMA-LPN: Processing-in-memory Acceleration for Efficient LPN-based Post-Quantum Cryptography. - Lin Ding; Song Bian 001; Jiliang Zhang 002 (DAC, 2023)

An FPGA-Compatible TRNG with Ultra-High Throughput and Energy Efficiency. - Zhaojun Lu; Houjia Qidiao; Qidong Chen; Zhenglin Liu; Jiliang Zhang 002 (DAC, 2023)

MES-Attacks: Software-Controlled Covert Channels based on Mutual Exclusion and Synchronization. - Chaoqun Shen; Jiliang Zhang 002; Gang Qu 001 (DAC, 2023)

Spoiler-Alert: Detecting Spoiler Attacks Using a Cuckoo Filter. - Jinhua Cui 002; Yiyun Yin; Congcong Chen; Jiliang Zhang 002 (DATE, 2023)

A Ray-Launching Algorithm for Polarized Wireless Channel Prediction. - Gang Yu; Lingyou Zhou; Jiliang Zhang 002; Jie Zhang 003 (GLOBECOM (Workshops), 2023)

Imperceptible Sample-Specific Backdoor to DNN with Denoising Autoencoder. - Jiliang Zhang 002; Jing Xu; Zhi Zhang 001; Yansong Gao 001 (CoRR, 2023)

A Fast Path Loss Model for Wireless Channels Considering Environmental Factors. - Lingyou Zhou; Jie Zhang 003; Jiliang Zhang 002; Oktay Cetinkaya; Steve Jubb (CoRR, 2023)

SYNC+SYNC: Software Cache Write Covert Channels Exploiting Memory-disk Synchronization. - Congcong Chen; Jinhua Cui 002; Gang Qu 001; Jiliang Zhang 002 (CoRR, 2023)

Artificial Intelligence Security: Threats and Countermeasures. - Yupeng Hu; Wenxin Kuang; Zheng Qin 001; Kenli Li 001; Jiliang Zhang 002; Yansong Gao 001; Wenjia Li; Keqin Li 001 (ACM Comput. Surv., 2023)

Two Double-Node-Upset-Hardened Flip-Flop Designs for High-Performance Applications. - Aibin Yan; Aoran Cao; Zhengfeng Huang; Jie Cui 004; Tianming Ni; Patrick Girard 001; Xiaoqing Wen; Jiliang Zhang 002 (IEEE Trans. Emerg. Top. Comput., 2023)

APMSA: Adversarial Perturbation Against Model Stealing Attacks. - Jiliang Zhang 002; Shuang Peng 010; Yansong Gao 001; Zhi Zhang 001; Qinghui Hong (IEEE Trans. Inf. Forensics Secur., 2023)

GASF-IPP: Detection and Mitigation of LDoS Attack in SDN. - Dan Tang; Siyuan Wang; Boru Liu; Wenqiang Jin; Jiliang Zhang 002 (IEEE Trans. Serv. Comput., 2023)

PI PUF: A Processor-Intrinsic PUF for IoT. - Li Ni; Pengjun Wang; Yuejun Zhang; Gang Li 038; Lin Ding; Jiliang Zhang 002 (Comput. Electr. Eng., 2023)

Circuit Design and Application of Discrete Cosine Transform Based on Memristor. - Qinghui Hong; Bang He; Zedi Zhang; Pingdan Xiao; Sichun Du; Jiliang Zhang 002 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

Designs of BCD Adder Based on Excess-3 Code in Quantum-Dot Cellular Automata. - Aibin Yan; Runqi Liu; Jie Cui 004; Tianming Ni; Patrick Girard 001; Xiaoqing Wen; Jiliang Zhang 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Programmable In-Memory Computing Circuit for Solving Combinatorial Matrix Operation in One Step. - Qinghui Hong; Shen Man; Jingru Sun; Sichun Du; Jiliang Zhang 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Design and Application of Biomimetic Memory Circuit Based on Hippocampus Mechanism. - Hegan Chen; Qinghui Hong; Wenqi Liu; Zhongrui Wang; Jiliang Zhang 002 (IEEE Trans. Cogn. Dev. Syst., 2023)

Bionic Dual-Loop Emotional Learning Circuit and Its Application in Radiation Early Warning Monitoring. - Hanpu Zhou; Zhuoying Fei; Qinghui Hong; Jingru Sun; Sichun Du; Tao Li 056; Jiliang Zhang 002 (IEEE Trans. Cogn. Dev. Syst., 2023)

In-Memory Computing Circuit Implementation of Complex-Valued Hopfield Neural Network for Efficient Portrait Restoration. - Qinghui Hong; Haotian Fu; Yiyang Liu 005; Jiliang Zhang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Programmable In-memory Computing Circuit of Fast Hartley Transform. - Qinghui Hong; Richeng Huang; Pingdan Xiao; Jun Li; Jingru Sun; Jiliang Zhang 002 (ACM Trans. Design Autom. Electr. Syst., 2023)

Mex+Sync: Software Covert Channels Exploiting Mutual Exclusion and Synchronization. - Jiliang Zhang 002; Chaoqun Shen; Gang Qu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

FTMaster: A Detection and Mitigation System of Low-Rate Flow Table Overflow Attacks via SDN. - Dan Tang; Chenjun Gao; Wei Liang 005; Jiliang Zhang 002; Keqin Li 001 (IEEE Trans. Netw. Serv. Manag., 2023)

SoK: Rowhammer on Commodity Operating Systems. - Zhi Zhang 001; Decheng Chen; Jiahao Qi; Yueqiang Cheng; Shijie Jiang; Yiyang Lin; Yansong Gao 001; Surya Nepal; Yi Zou; Jiliang Zhang 002; Yang Xiang 001 (AsiaCCS, 2024)

An NTT/INTT Accelerator with Ultra-High Throughput and Area Efficiency for FHE. - Zhaojun Lu; Weizong Yu; Peng Xu 003; Wei Wang 088; Jiliang Zhang 002; Dengguo Feng (DAC, 2024)

S2RAM PUF: An Ultra-low Power Subthreshold SRAM PUF with Zero Bit Error Rate. - Li Ni; Jiliang Zhang 002 (DAC, 2024)

SPECRUN: The Danger of Speculative Runahead Execution in Processors. - Chaoqun Shen; Gang Qu 001; Jiliang Zhang 002 (DAC, 2024)

DH-TRNG: A Dynamic Hybrid TRNG with Ultra-High Throughput and Area-Energy Efficiency. - Yuan Zhang; Kuncai Zhong; Jiliang Zhang 002 (DAC, 2024)

A Cryptographic Hardware Engineering Course based on FPGA and Security Analysis Equipment. - Zhaojun Lu; Qidong Chen; Peng Xu 003; Jiliang Zhang 002; Gang Qu 001 (ACM Great Lakes Symposium on VLSI, 2024)

SegScope: Probing Fine-grained Interrupts via Architectural Footprints. - Xin Zhang 110; Zhi Zhang 001; Qingni Shen; Wenhao Wang 001; Yansong Gao 001; Zhuoxi Yang; Jiliang Zhang 002 (HPCA, 2024)

CIM-KF: Efficient Computing-in-memory Circuits for Full-Process Execution of Kalman Filter Algorithm. - Pingdan Xiao; Qinghui Hong; Sichun Du; Jiliang Zhang 002 (ICPP, 2024)

FOSA: A Highly Fault-Tolerant Operating System Architecture. - Qiao Peng; Xiaoguo Wan; Jiliang Zhang 002 (ITC-Asia, 2024)

A Brief Survey on Randomizer Design and Optimization for Efficient Stochastic Computing. - Kuncai Zhong; Jiangyuan Wang; Lu Chen; Peng Wang; Zixuan You; Yuan Zhang; Jiliang Zhang 002 (ITC-Asia, 2024)

EXCLF: A LDoS attack detection & mitigation model based on programmable data plane. - Dan Tang; Hongbo Cao; Jiliang Zhang 002; Zheng Qin 001; Wei Liang 005; Xiaopu Ma (Comput. Networks, 2024)

APACHE: A Processing-Near-Memory Architecture for Multi-Scheme Fully Homomorphic Encryption. - Lin Ding; Song Bian 001; Penggao He; Yan Xu; Gang Qu 001; Jiliang Zhang 002 (CoRR, 2024)

BETA: Automated Black-box Exploration for Timing Attacks in Processors. - Congcong Chen; Jinhua Cui 002; Jiliang Zhang 002 (CoRR, 2024)

SIAT: A systematic inter-component communication real-time analysis technique for detecting data leak threats on Android. - Yupeng Hu; Wenxin Kuang; Zhe Jin; Wenjia Li; Keqin Li 001; Jiliang Zhang 002; Qiao Hu (J. Comput. Secur., 2024)

Recent advances on reliability of FPGAs in a radiation environment. - Zhe Liu; Zukun Lu; Long Huang; Zhiwei Yao; Zhaojun Lu; Jiliang Zhang 002 (Microelectron. J., 2024)

Quantization Backdoors to Deep Learning Commercial Frameworks. - Hua Ma; Huming Qiu; Yansong Gao 001; Zhi Zhang 001; Alsharif Abuadbba; Minhui Xue 001; Anmin Fu; Jiliang Zhang 002; Said F. Al-Sarawi; Derek Abbott (IEEE Trans. Dependable Secur. Comput., 2024)

Design and Application of Programmable Analog Circuit for Solving Lyapunov Matrix Equation Based on Memristors. - Pingdan Xiao; Qinghui Hong; Jingru Sun; Sichun Du; Jiliang Zhang 002 (IEEE Trans. Ind. Electron., 2024)

Write+Sync: Software Cache Write Covert Channels Exploiting Memory-Disk Synchronization. - Congcong Chen; Jinhua Cui 002; Gang Qu 001; Jiliang Zhang 002 (IEEE Trans. Inf. Forensics Secur., 2024)

FTOP: An Efficient Flow Table Overflow Preventing System for Switches in SDN. - Dan Tang; Zhiqing Zheng; Keqin Li 001; Chao Yin; Wei Liang 005; Jiliang Zhang 002 (IEEE Trans. Netw. Sci. Eng., 2024)

A High Throughput STR-based TRNG by Jitter Precise Quantization Superposing. - Yuan Zhang; Jiliang Zhang 002 (ACM Trans. Design Autom. Electr. Syst., 2024)

Adaptive Biomimetic Neuronal Circuit System Based on Myelin Sheath Function. - Xiaosong Li; Jingru Sun; Wenjing Ma; Yichuang Sun; Chunhua Wang 001; Jiliang Zhang 002 (IEEE Trans. Consumer Electron., 2024)

Analog-in-Memory Accelerator Design Based on Memristive Arrays for Opposite Directional Interference Alignment Algorithm. - Pingdan Xiao; Qinghui Hong; Sichun Du; Jiliang Zhang 002 (IEEE Trans. Ind. Informatics, 2024)

An RRAM-Based Computing-in-Memory Architecture and Its Application in Accelerating Transformer Inference. - Zhaojun Lu; Xueyan Wang; Md Tanvir Arafin; Haoxiang Yang; Zhenglin Liu; Jiliang Zhang 002; Gang Qu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2024)

SI PUF: An SRAM and Inverter-Based PUF With a Bit Error Rate of 0.0053% and 0.073/0.042 pJ/bit. - Li Ni; Pengjun Wang; Yuejun Zhang; Xiangyu Li 011; Gang Li 038; Lin Ding; Jiliang Zhang 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Design of Artificial Neurons of Memristive Neuromorphic Networks Based on Biological Neural Dynamics and Structures. - Xiaosong Li; Jingru Sun; Yichuang Sun; Chunhua Wang 001; Qinghui Hong; Sichun Du; Jiliang Zhang 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Timing Side-channel Attacks and Countermeasures in CPU Microarchitectures. - Jiliang Zhang 002; Congcong Chen; Jinhua Cui 002; Keqin Li 001 (ACM Comput. Surv., 2024)

Design of Optoelectronic In-Sensor Computing Circuit Based on Memristive Crossbar Array for In Situ Edge Extraction. - Jiliang Zhang 002; Xinjie Li 005; Pingdan Xiao; Zhengmiao Wei; Qinghui Hong (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Memristive Circuit Implementation of Caenorhabditis Elegans Mechanism for Neuromorphic Computing. - Hegan Chen; Qinghui Hong; Zhongrui Wang; Chunhua Wang 001; Xiangxiang Zeng; Jiliang Zhang 002 (IEEE Trans. Neural Networks Learn. Syst., 2024)

Analog In-memory Circuit Design of Polynomial Multiplication for Lattice Cipher Acceleration Application. - Sichun Du; Jun Li; Chen Sun; Pingdan Xiao; Qinghui Hong; Jiliang Zhang 002 (ACM Trans. Embed. Comput. Syst., 2024)

CPU Address-Leakage Transient Execution Attack Detection and Its Countermeasures. - Yiyun Yin; Jinhua Cui 002; Jiliang Zhang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

FAPM: A Fake Amplification Phenomenon Monitor to Filter DRDoS Attacks With P4 Data Plane. - Dan Tang; Xiaocai Wang; Keqin Li 001; Chao Yin; Wei Liang 005; Jiliang Zhang 002 (IEEE Trans. Netw. Serv. Manag., 2024)

PLUTO: A Robust LDoS Attack Defense System Executing at Line Speed. - Dan Tang; Boru Liu; Keqin Li 001; Sheng Xiao; Wei Liang 005; Jiliang Zhang 002 (IEEE Trans. Dependable Secur. Comput., 2025)

Meta: A Memory-Efficient Tri-Stage Polynomial Multiplication Accelerator Using 2D Coupled-BFUs. - Yan Xu; Lin Ding; Penggao He; Zhaojun Lu; Jiliang Zhang 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

Nested Speculative Execution Attacks via Runahead. - Chaoqun Shen; Gang Qu 001; Jiliang Zhang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)