A high-speed adaptive linear equalizer with ISI level detection using periodic training pattern. - Jin-Cheol Seo; Tae-Ho Kim; Taek-Joon An; Kwan Yoon; Jin-Ku Kang (ISOCC, 2012)

A 1.62/2.7/5.4Gbps clock and data recovery circuit for DisplayPort 1.2. - Jin-Cheol Seo; Sang-Soon Im; Kwan-Hee Yoon; Seung-Wook Oh; Taek-Joon An; Gi-Yeol Bae; Jin-Ku Kang (SoCC, 2012)

A 10Gb/s adaptive equalizer with ISI level measurement. - Tae-Ho Kim; Jin-Cheol Seo; Yong-Sung Ahn; Jin-Ku Kang (IEICE Electron. Express, 2012)

An ultra-low power BPSK demodulator with dual band filtering for implantable biomedical devices. - Benjamin P. Wilkerson; Joon-Hyup Seo; Jin-Cheol Seo; Jin-Ku Kang (IEICE Electron. Express, 2013)