An exact solution to simultaneous technology mapping and linear placement problem. - Jinan Lou; Amir H. Salek; Massoud Pedram (ICCAD, 1997)

An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits. - Jinan Lou; Amir H. Salek; Massoud Pedram (ASP-DAC, 1998)

A DSM Design Flow: Putting Floorplanning, Technology-Napping, and Gate-Placement Together. - Amir H. Salek; Jinan Lou; Massoud Pedram (DAC, 1998)

A simultaneous routing tree construction and fanout optimization algorithm. - Amir H. Salek; Jinan Lou; Massoud Pedram (ICCAD, 1998)

MERLIN: Semi-Order-Independent Hierarchical Buffered Routing Tree Generation Using Local Neighborhood Search. - Amir H. Salek; Jinan Lou; Massoud Pedram (DAC, 1999)

Concurrent logic restructuring and placement for timing closure. - Jinan Lou; Wei Chen; Massoud Pedram (ICCAD, 1999)

An integrated logical and physical design flow for deep submicron circuits. - Amir H. Salek; Jinan Lou; Massoud Pedram (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Estimating routing congestion using probabilistic analysis. - Jinan Lou; Shankar Krishnamoorthy; Henry S. Sheng (ISPD, 2001)

Estimating routing congestion using probabilistic analysis. - Jinan Lou; Shashidhar Thakur; Shankar Krishnamoorthy; Henry S. Sheng (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Hierarchical buffered routing tree generation. - Amir H. Salek; Jinan Lou; Massoud Pedram (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Cross talk driven placement. - Jinan Lou; Wei Chen (ASP-DAC, 2003)

Crosstalk-Aware Placement. - Jinan Lou; Wei Chen (IEEE Des. Test Comput., 2004)

Post sign-off leakage power optimization. - Hamed Abrishami; Jinan Lou; Jeff Qin; Jürgen Frößl; Massoud Pedram (DAC, 2011)