3D memory stacking for fast checkpointing/restore applications. - Jing Xie 006; Xiangyu Dong 001; Yuan Xie 001 (3DIC, 2010)

A 3D SoC design for H.264 application with on-chip DRAM stacking. - Tao Zhang 032; Kui Wang; Yi Feng 003; Yan Chen; Qun Li; Bing Shao; Jing Xie 006; Xiaodi Song; Lian Duan; Yuan Xie 001; Xu Cheng 001; Youn-Long Lin (3DIC, 2010)

Architectural benefits and design challenges for three-dimensional integrated circuits. - Jing Xie 006; Jishen Zhao; Xiangyu Dong 001; Yuan Xie 001 (APCCAS, 2010)

Evaluation of using inductive/capacitive-coupling vertical interconnects in 3D network-on-chip. - Jin Ouyang; Jing Xie 006; Matthew Poremba; Yuan Xie 001 (ICCAD, 2010)

Yield-aware time-efficient testing and self-fixing design for TSV-based 3D ICs. - Jing Xie 006; Yu Wang 002; Yuan Xie 001 (ASP-DAC, 2012)

Mitigating electromigration of power supply networks using bidirectional current stress. - Jing Xie 006; Vijaykrishnan Narayanan; Yuan Xie 001 (ACM Great Lakes Symposium on VLSI, 2012)

CPDI: Cross-power-domain interface circuit design in monolithic 3D technology. - Jing Xie 006; Yang Du; Yuan Xie 001 (ISQED, 2013)

Cost-driven 3D design optimization with metal layer reduction technique. - Qiaosha Zou; Jing Xie 006; Yuan Xie 001 (ISQED, 2013)

Testable cross-power domain interface (CPDI) circuit design in monolithic 3D technology. - Jing Xie 006; Yang Du; Yuan Xie 001 (ACM J. Emerg. Technol. Comput. Syst., 2014)