Placement for Wafer-Scale Deep Learning Accelerator. - Benzheng Li; Qi Du; Dingcheng Liu; Jingchong Zhang; Gengjie Chen; Hailong You (ASP-DAC, 2021)

Effective and Efficient Detailed Routing with Adaptive Rip-up Scheme and Pin Access Refinement. - Zhongdong Qi; Jingchong Zhang; Gengjie Chen; Hailong You (ACM Great Lakes Symposium on VLSI, 2022)