Hybrid Implicit Iteration Process for a Finite Family of Non-Self-Nonexpansive Mappings in Uniformly Convex Banach Spaces. - Qiaohong Jiang; Jinghai Wang; Jian-Hua Huang (J. Appl. Math., 2014)

An Efficient Asynchronous Circuits Design Flow with Backward Delay Propagation Constraint. - Lingfeng Zhou; Shanlin Xiao; Huiyao Wang; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (DATE, 2024)

An FPGA-based QDI Asynchronous Circuits Design Methodology. - Guangyao Lin; Jinghai Wang; Zeyang Xu; Zhiyi Yu; Shanlin Xiao (ICTA, 2024)

Better-Than-Worst-Case: A Frequency Adaptation Asynchronous RISC-V Core With Vector Extension. - Lingfeng Zhou; Shanlin Xiao; Huiyao Wang; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (IEEE Trans. Very Large Scale Integr. Syst., 2024)

LAC: A Novel Lightweight Asynchronous Controller With Optimized Phase Shift. - Huiyao Wang; Shanlin Xiao; Lingfeng Zhou; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Toward Efficient Asynchronous Circuits Design Flow Using Backward Delay Propagation Constraint. - Lingfeng Zhou; Shanlin Xiao; Huiyao Wang; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (IEEE Trans. Very Large Scale Integr. Syst., 2024)

SCSC: Leveraging Sparsity and Fault-Tolerance for Energy-Efficient Spiking Neural Networks. - Bo Li; Yue Liu; Wei Liu 118; Jinghai Wang; Xiao Huang; Zhiyi Yu; Shanlin Xiao (ASP-DAC, 2025)

FDAIMC: A Fully-Differential Analog In-Memory-Computing for MAC in MRAM with Accuracy Calibration Under Process and Voltage Variation. - Xiangyu Li; Weichong Chen; Ruida Hong; Jinghai Wang; Ningyuan Yin; Zhiyi Yu (DATE, 2025)

A Time-Borrowing Method for High-Performance Bundled-Data Asynchronous Circuits. - Bohan Wang; Zeyang Xu; Lingfeng Zhou; Huiyao Wang; Jinghai Wang; Zhiyi Yu; Shanlin Xiao (ISQED, 2025)

An End-to-End Bundled-Data Asynchronous Circuits Design Flow: From RTL to GDS. - Jinghai Wang; Shanlin Xiao; Jilong Luo; Bo Li; Lingfeng Zhou; Zhiyi Yu (IEEE Trans. Very Large Scale Integr. Syst., 2025)