A 55nm logic process compatible p-flash memory array fully demonstrated with high reliability. - Jinghui Han; Yao Zhou; Hao Ni; Xiao Zheng; Yi Zhao (ASICON, 2017)

NiGe metal source/drain Ge pMOSFETs for future high performance VLSI circuits applications. - Rui Zhang 024; Jinghui Han; Junkang Li; Xiaoyu Tang; Yi Zhao (ASICON, 2017)

Sub-1 ns characterization methodology for transistor electrical parameter extraction. - Yiming Qu; Bing Chen; Wei Liu; Jinghui Han; Jiwu Lu; Yi Zhao 015 (Microelectron. Reliab., 2018)