Designing a Coarse-Grained Reconfigurable Architecture Using Loop Self-Pipelining. - Jinhui Xu 002; Guiming Wu; Yong Dou; Yazhuo Dong (Asia-Pacific Computer Systems Architecture Conference, 2006)

The Implementation of a Coarse-Grained Reconfigurable Architecture with Loop Self-pipelining. - Yong Dou; Jinhui Xu 002; Guiming Wu (ARC, 2007)

Computation rotating for data reuse. - Guiming Wu; Jinhui Xu 002; Yong Dou; Miao Wang (ACSAC, 2008)

DMA Performance Analysis and Multi-core Memory Optimization for SWIM Benchmark on the Cell Processor. - Yong Dou; Lin Deng; Jinhui Xu 002; Yi Zheng (ISPA, 2008)

A coarse-grained reconfigurable computing architecture with loop self-pipelining. - Yong Dou; Guiming Wu; Jinhui Xu 002; Xingming Zhou (Sci. China Ser. F Inf. Sci., 2009)