A 13.5-mW 10-Gb/s 4-PAM Serial Link Transmitter in 0.13-µm CMOS Technology. - Bongsub Song; Kyunghoon Kim; Junan Lee; Jinil Chung; Youngjung Choi; Jinwook Burm (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Domain wall memory based digital signal processors for area and energy-efficiency. - Jinil Chung; Kenneth Ramclam; Jongsun Park 001; Swaroop Ghosh (DAC, 2015)

Domain Wall Memory based Convolutional Neural Networks for Bit-width Extendability and Energy-Efficiency. - Jinil Chung; Jongsun Park 001; Swaroop Ghosh (ISLPED, 2016)

Overview of Circuits, Systems, and Applications of Spintronics. - Swaroop Ghosh; Anirudh Iyengar; Seyedhamidreza Motaman; Rekha Govindaraj; Jae-Won Jang; Jinil Chung; Jongsun Park 001; Xin Li 001; Rajiv V. Joshi; Dinesh Somasekhar (IEEE J. Emerg. Sel. Topics Circuits Syst., 2016)

Exploiting Serial Access and Asymmetric Read/Write of Domain Wall Memory for Area and Energy-Efficient Digital Signal Processor Design. - Jinil Chung; Kenneth Ramclam; Jongsun Park 001; Swaroop Ghosh (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm class DRAM process. - Ki Chul Chun; Yonggyu Chu; Jin-Seok Heo; Tae-Sung Kim; Soohwan Kim; Hui-Kap Yang; Mi-Jo Kim; Chang-Kyo Lee; Ju-Hwan Kim; Hyunchul Yoon; Chang-Ho Shin; Sang-uhn Cha; et al. (ISSCC, 2018)

A 1.1V 1ynm 6.4Gb/s/pin 16Gb DDR5 SDRAM with a Phase-Rotator-Based DLL, High-Speed SerDes and RX/TX Equalization Scheme. - Dongkyun Kim; Minsu Park; Sungchun Jang; Jun-Yong Song; Hankyu Chi; Geunho Choi; Sunmyung Choi; Jaeil Kim; Changhyun Kim; Kyung Whan Kim; Kibong Koo; Seonghwi Song; et al. (ISSCC, 2019)

Domain Wall Memory-Based Design of Deep Neural Network Convolutional Layers. - Jinil Chung; Woong Choi; Jongsun Park 001; Swaroop Ghosh (IEEE Access, 2020)

A 1.3-4-GHz Quadrature-Phase Digital DLL Using Sequential Delay Control and Reconfigurable Delay Line. - Hyunsu Park; Jincheol Sim; Yoonjae Choi; Jonghyuck Choi; Youngwook Kwon; Seungwoo Park; Gyutae Park; Jinil Chung; Kyeong-Min Kim; Hae-Kang Jung; Hyungsoo Kim; Junhyun Chun; et al. (IEEE J. Solid State Circuits, 2021)