Protein fold recognition based on functional domain composition. - Qin Wang 003; Jinli Yan; Xiaoqin Li (Comput. Biol. Chem., 2014)

Towards high-performance packet processing on commodity multi-cores: current issues and future directions. - Lu Tang; Jinli Yan; Zhigang Sun; Tao Li 008; Minxuan Zhang (Sci. China Inf. Sci., 2015)

Self-described buffer: A novel mechanism to improve packet I/O efficiency in Linux. - Jinli Yan; Lu Tang; Zhigang Sun; Tao Li 008; Donglai Xu (IWQoS, 2016)

Demonstration of Path-Based Packet Batcher for Accelerating Vectorized Packet Processing. - Jinli Yan; Tao Li 008; Sheng Wang; Gaofeng Lv; Zhigang Sun (SECON, 2018)

UniSec: a unified security framework with SmartNIC acceleration in public cloud. - Jinli Yan; Lu Tang; Junnan Li 002; Xiangrui Yang 002; Wei Quan 004; Hongyi Chen; Zhigang Sun (ACM TUR-C, 2019)

FAST: enabling fast software/hardware prototype for network experimentation. - Xiangrui Yang 002; Zhigang Sun; Junnan Li 002; Jinli Yan; Tao Li 008; Wei Quan 004; Donglai Xu; Gianni Antichi (IWQoS, 2019)

TSN-Builder: Enabling Rapid Customization of Resource-Efficient Switches for Time-Sensitive Networking. - Jinli Yan; Wei Quan 004; Xiangrui Yang 002; Wenwen Fu; Yue Jiang; Hui Yang; Zhigang Sun (DAC, 2020)

On-line Traffic Scheduling optimization in IEEE 802.1Qch based Time-Sensitive Networks. - Wei Quan 004; Jinli Yan; Xuyan Jiang; Zhigang Sun (HPCC/DSS/SmartCity, 2020)

Network Programming Interface in General-Purpose Multi-core Processor: A Survey. - Jinli Yan; Chunbo Jia; Lu Tang; Tao Li 008; Gaofeng Lv; Wei Quan 004; Hui Yang (ICCSE, 2020)

PPB: a Path-based Packet Batcher to Accelerate Vector Packet Processor. - Jinli Yan; Lu Tang; Tao Li 008; Gaofeng Lv; Wei Quan 004; Hui Yang (ICCSE, 2020)

Injection Time Planning: Making CQF Practical in Time-Sensitive Networking. - Jinli Yan; Wei Quan 004; Xuyan Jiang; Zhigang Sun (INFOCOM, 2020)

A Hierarchical Model of Control Logic for Simplifying Complex Networks Protocol Design. - Yi Yang; Wei Quan 004; Jinli Yan; Lu Tang; Zhigang Sun (NPC, 2020)

Fenglin-I: an open-source TSN chip for scenario-driven customization. - Wenwen Fu; Jinli Yan; Wei Quan 004; Zhigang Sun (SIGCOMM Posters and Demos, 2020)

TSNTag: a multi-semantic flow identification mechanism enabling full-custom TSN design. - Jinli Yan; Wenwen Fu; Wei Quan 004; Zhigang Sun (SIGCOMM Posters and Demos, 2020)

Indoor 3D Semantic Robot VSLAM Based on Mask Regional Convolutional Neural Network. - Chongben Tao; Zhen Gao; Jinli Yan; Chunguang Li; Guozeng Cui (IEEE Access, 2020)

OpenTSN: an open-source project for time-sensitive networking system development. - Wei Quan 004; Wenwen Fu; Jinli Yan; Zhigang Sun (CCF Trans. Netw., 2020)

A flexible 3D force sensor for handwriting recognition. - Mengying Zhao; Jialei Geng; Jinli Yan; Xinjian Chen 001; Baoqing Nie (CISP-BMEI, 2021)

Fenglin-I: An Open-Source Time-Sensitive Networking Chip Enabling Agile Customization. - Wenwen Fu; Wei Quan 004; Jinli Yan; Zhigang Sun (IEEE Trans. Computers, 2023)