MP-OPU: A Mixed Precision FPGA-based Overlay Processor for Convolutional Neural Networks. - Chen Wu; Jinming Zhuang; Kun Wang 005; Lei He 001 (FPL, 2021)

High Performance, Low Power Matrix Multiply Design on ACAP: from Architecture, Design Challenges and DSE Perspectives. - Jinming Zhuang; Zhuoping Yang; Peipei Zhou 001 (DAC, 2023)

CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture. - Jinming Zhuang; Jason Lau; Hanchen Ye; Zhuoping Yang; Yubo Du; Jack Lo; Kristof Denolf; Stephen Neuendorffer; Alex K. Jones; Jingtong Hu; Deming Chen; Jason Cong; et al. (FPGA, 2023)

AIM: Accelerating Arbitrary-Precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP. - Zhuoping Yang; Jinming Zhuang; Jiaqi Yin; Cunxi Yu; Alex K. Jones; Peipei Zhou 001 (ICCAD, 2023)

REFRESH FPGAs: Sustainable FPGA Chiplet Architectures. - Peipei Zhou 001; Jinming Zhuang; Stephen Cahoon; Yue Tang 002; Zhuoping Yang; Xingzhen Chen; Yiyu Shi 001; Jingtong Hu; Alex K. Jones (IGSC, 2023)

AutoMM: Energy-Efficient Multi-Data-Type Matrix Multiply Design on Heterogeneous Programmable System-on-Chip. - Jinming Zhuang; Zhuoping Yang; Peipei Zhou 001 (CoRR, 2023)

Challenges and Opportunities to Enable Large-Scale Computing via Heterogeneous Chiplets. - Zhuoping Yang; Shixin Ji; Xingzhen Chen; Jinming Zhuang; Weifeng Zhang; Dharmesh Jani; Peipei Zhou 001 (ASPDAC, 2024)

SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration. - Jinming Zhuang; Zhuoping Yang; Shixin Ji; Heng Huang; Alex K. Jones; Jingtong Hu; Yiyu Shi 001; Peipei Zhou 001 (FPGA, 2024)

Amortizing Embodied Carbon Across Generations. - Shixin Ji; Jinming Zhuang; Zhuoping Yang; Alex K. Jones; Peipei Zhou 001 (IGSC, 2024)

CHARM 2.0: Composing Heterogeneous Accelerators for Deep Learning on Versal ACAP Architecture. - Jinming Zhuang; Jason Lau; Hanchen Ye; Zhuoping Yang; Shixin Ji; Jack Lo; Kristof Denolf; Stephen Neuendorffer; Alex K. Jones; Jingtong Hu; Yiyu Shi 001; Deming Chen; et al. (ACM Trans. Reconfigurable Technol. Syst., 2024)

EQ-ViT: Algorithm-Hardware Co-Design for End-to-End Acceleration of Real-Time Vision Transformer Inference on Versal ACAP Architecture. - Peiyan Dong; Jinming Zhuang; Zhuoping Yang; Shixin Ji; Yanyu Li; Dongkuan Xu; Heng Huang; Jingtong Hu; Alex K. Jones; Yiyu Shi 001; Yanzhi Wang; Peipei Zhou 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Ph.D. Project ARIES: Efficient Mapping and Automated Compilation for AMD Versal Devices. - Jinming Zhuang; Peipei Zhou 001 (FCCM, 2025)

Towards Accelerator Customization in Real-time Safety-critical Systems. - Shixin Ji; Xingzhen Chen; Wei Zhang 062; Zhuoping Yang; Jinming Zhuang; Sarah Schultz; Yukai Song; Jingtong Hu; Alex K. Jones; Zheng Dong 002; Peipei Zhou 001 (FPGA, 2025)

ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines. - Jinming Zhuang; Shaojie Xiang; Hongzheng Chen; Niansong Zhang; Zhuoping Yang; Tony Mao; Zhiru Zhang; Peipei Zhou 001 (FPGA, 2025)

ART: Customizing Accelerators for DNN-Enabled Real-Time Safety-Critical Systems. - Shixin Ji; Xingzhen Chen; Jinming Zhuang; Wei Zhang 062; Zhuoping Yang; Sarah Schultz; Yukai Song; Jingtong Hu; Alex K. Jones; Zheng Dong 002; Peipei Zhou 001 (ACM Great Lakes Symposium on VLSI, 2025)

AGILE: Lightweight and Efficient Asynchronous GPU-SSD Integration. - Zhuoping Yang; Jinming Zhuang; Xingzhen Chen; Alex K. Jones; Peipei Zhou 001 (CoRR, 2025)