A sigma-delta ADC with a built-in anti-aliasing filter for Bluetooth receiver in 130nm digital process. - Jinseok Koh; Khurram Muhammad; Robert Bogdan Staszewski; Gabriel Gomez; Baher Horoun (CICC, 2004)

All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS. - Robert Bogdan Staszewski; Khurram Muhammad; Dirk Leipold; Chih-Ming Hung; Yo-Chuol Ho; John L. Wallberg; Chan Fernando; Ken Maggio; Roman Staszewski; Tom Jung; Jinseok Koh; Soji John; et al. (IEEE J. Solid State Circuits, 2004)

A 1.5V multirate multibit sigma delta modulator for GSM/WCDMA in a 90 nm digital CMOS process. - Oguz Altun; Jinseok Koh; Phillip E. Allen (ISCAS (6), 2005)

SoC with an integrated DSP and a 2.4-GHz RF transmitter. - Robert Bogdan Staszewski; Roman Staszewski; John L. Wallberg; Tom Jung; Chih-Ming Hung; Jinseok Koh; Dirk Leipold; Kenneth Maggio; Poras T. Balsara (IEEE Trans. Very Large Scale Integr. Syst., 2005)

A Sigma-Delta ADC with Decimation and Gain Control Function for a Bluetooth Receiver in 130 nm Digital CMOS. - Jinseok Koh; Gabriel Gomez; Khurram Muhammad; Robert Bogdan Staszewski; Baher Haroun (EURASIP J. Wirel. Commun. Netw., 2006)

Low-noise amplifier path for ultrasound system applications. - Jayang Yoon; Seok Lee; Jaehoon Kim; Namjin Song; Jinseok Koh; Joongho Choi (APCCAS, 2010)

A 0.028% THD+N, 91% power-efficiency, 3-level PWM Class-D amplifier with a true differential front-end. - Sunwoo Kwon; Injeong Kim; Shinyoung Yi 002; Sangheyub Kang; Sangheon Lee; Taeho Hwang; Byoungkwon Moon; Yunyoung Choi; Hosung Sung; Jinseok Koh (ISSCC, 2012)

A 0.018% THD+N, 88-dB PSRR PWM Class-D Amplifier for Direct Battery Hookup. - Youngkil Choi; Wonho Tak; Younghyun Yoon; Jeongjin Roh; Sunwoo Kwon; Jinseok Koh (IEEE J. Solid State Circuits, 2012)