The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance. - Jinsong Hou; Zeyi Wang; Xianlong Hong (ASP-DAC, 1999)

Design of Monitor and Protect Circuits against FIB Attack on Chip Security. - Mengmeng Ling; Liji Wu; Xiangyu Li 002; Xiangmin Zhang; Jinsong Hou; Yong Wang (CIS, 2012)