An Asynchronous AER Circuits with Rotation Priority Tree Arbiter for Neuromorphic Hardware with Analog Neuron. - Jinsong Wei; Jilin Zhang; Xumeng Zhang; Zuheng Wu; Chunmeng Dou; Tuo Shi; Hong Chen 002; Qi Liu 010 (ASICON, 2019)

An Asynchronous Reconfigurable SNN Accelerator With Event-Driven Time Step Update. - Jilin Zhang; Hui Wu; Jinsong Wei; Shaojun Wei; Hong Chen 002 (A-SSCC, 2019)

Design of Multi-core Spiking Neural Network Chip Based on Butterfly Network. - Hao Jiang 024; Jinsong Wei; Ye Li; Jikai Lu; Tuo Shi; Qi Liu 010 (ASICON, 2021)

RRAM-based Analog-Weight Spiking Neural Network Accelerator with in-situ Learning for IoT Applications. - Jikai Lu; Jinsong Wei; Junjie An; Chenggao Zhang; Tuo Shi; Qi Liu 010 (ASICON, 2021)

A 28nm Configurable Asynchronous SNN Accelerator with Energy-Efficient Learning. - Jilin Zhang; Mingxuan Liang; Jinsong Wei; Shaojun Wei; Hong Chen 002 (ASYNC, 2021)

A neuromorphic core based on threshold switching memristor with asynchronous address event representation circuits. - Jinsong Wei; Jilin Zhang; Xumeng Zhang; Zuheng Wu; Rui Wang; Jian Lu; Tuo Shi; Mansun Chan; Qi Liu 010; Hong Chen 002 (Sci. China Inf. Sci., 2022)

Multicore Spiking Neuromorphic Chip in 180-nm With ReRAM Synapses and Digital Neurons. - Hao Jiang 024; Jikai Lu; Chenggao Zhang; Shuangzhu Tang; Junjie An; Lingli Cheng; Jian Lu; Jinsong Wei; Keji Zhou; Xumeng Zhang; Tuo Shi; Qi Liu 010 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

Policy optimization and practical applications in blockchain-enabled electric vehicle battery recycling system. - Zhuoqun Li; Jinsong Wei (Comput. Ind. Eng., 2025)