Automatic Dent-landmark detection in 3-D CBCT dental volumes. - Erkang Cheng; Jinwu Chen; Jie Yang 030; Huiyang Deng; Yi Wu 001; Vasileios Megalooikonomou; Bryce Gable; Haibin Ling (EMBC, 2011)

A Charge-Digital Hybrid Compute-In-Memory Macro with full precision 8-bit Multiply-Accumulation for Edge Computing Devices. - Jinwu Chen; Tianzhu Xiong; Xin Si (MCSoC, 2022)

Evaluation Model for Current-Domain SRAM-based Computing-in-Memory Circuits. - Yiran Zhang; Bo Wang 023; Jinwu Chen; Xi Chen 107; Xin Si (MCSoC, 2023)

From macro to microarchitecture: reviews and trends of SRAM-based compute-in-memory circuits. - Zhaoyang Zhang; Jinwu Chen; Xi Chen 107; An Guo 001; Bo Wang 023; Tianzhu Xiong; Yuyao Kong; Xingyu Pu; Shengnan He; Xin Si; Jun Yang 006 (Sci. China Inf. Sci., 2023)

A 28nm 16kb Aggregation and Combination Computing-in-Memory Macro with Dual-level Sparsity Modulation and Sparse-Tracking ADCs for GCNs. - Zhaoyang Zhang; Zhichao Liu; Feiran Liu; Yinhai Gao; Yuchen Ma; Yutong Zhang; An Guo 001; Tianzhu Xiong; Jinwu Chen; Xi Chen 107; Bo Wang 023; Yuchen Tang; et al. (CICC, 2024)

34.3 A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNs. - An Guo 001; Xi Chen 107; Fangyuan Dong; Jinwu Chen; Zhihang Yuan; Xing Hu 010; Yuanpeng Zhang; Jingmin Zhang; Yuchen Tang; Zhican Zhang; Gang Chen 023; Dawei Yang; et al. (ISSCC, 2024)

An INT8 Charge-Digital Hybrid Compute-In-Memory Macro With CNN-Friendly Shift-Feed Register Design. - Jinwu Chen; Yitong Zhao; Tianzhu Xiong; Xin Si (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Toggle Rate Aware Quantization Model Based on Digital Floating-Point Computing-In-Memory Architecture. - Xi Chen 107; Yitong Zhao; An Guo 001; Jinwu Chen; Fangyuan Dong; Zhaoyang Zhang; Tianzhu Xiong; Bo Wang 023; Yuyao Kong; Xin Si (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

14.6 A 28nm 64kb Bit-Rotated Hybrid-CIM Macro with an Embedded Sign-Bit-Processing Array and a Multi-Bit-Fusion Dual-Granularity Cooperative Quantizer. - Xi Chen 107; Shaochen Li; Zhican Zhang; Wentao Zheng; Xiao Tan; Yuchen Tang; Yuhui Shi; Lizheng Ren; Yibo Mai; Feiran Liu; Jinwu Chen; Zhaoyang Zhang; et al. (ISSCC, 2025)

14.7 NeuroPilot: A 28nm, 69.4fJ/node and 0.22ns/node, 32×32 Mimetic-Path-Searching CIM-Macro with Dynamic-Logic Pilot PE and Dual-Direction Searching. - An Guo 001; Jingmin Zhang; Xingyu Pu; Yi Yang 001; Defa Wu; Yuchen Tang; Yuhui Shi; Yinghai Gao; Zhichao Liu; Bo Wang 023; Tianzhu Xiong; Zhaoyang Zhang; et al. (ISSCC, 2025)

14.3 A 28nm 17.83-to-62.84TFLOPS/W Broadcast-Alignment Floating-Point CIM Macro with Non-Two's-Complement MAC for CNNs and Transformers. - Xing Wang; Tianhui Jiao; Yi Yang 001; Shaochen Li; Dongqi Li; An Guo 001; Yuhui Shi; Yuchen Tang; Jinwu Chen; Zhican Zhang; Zhichao Liu; Bo Liu 019; et al. (ISSCC, 2025)

A 28-nm 16-kb Aggregation and Combination Computing-in-Memory Macro With Dual-Level Sparsity Modulation and Sparse-Tracking ADCs for GCNs. - Zhaoyang Zhang; Yanqi Zhang; Feiran Liu; Zhichao Liu; Yinhai Gao; Yuchen Ma; Yutong Zhang; An Guo 001; Tianzhu Xiong; Jinwu Chen; Xi Chen 107; Bo Wang 023; et al. (IEEE J. Solid State Circuits, 2025)