Evolver: A Deep Learning Processor With On-Device Quantization-Voltage-Frequency Tuning. - Fengbin Tu; Weiwei Wu; Yang Wang 089; Hongjiang Chen; Feng Xiong; Man Shi; Ning Li; Jinyi Deng; Tianbao Chen; Leibo Liu; Shaojun Wei; Yuan Xie 001; et al. (IEEE J. Solid State Circuits, 2021)

Erratum to "Evolver: a Deep Learning Processor With On-Device Quantization-Voltage-Frequency Tuning". - Fengbin Tu; Weiwei Wu; Yang Wang 089; Hongjiang Chen; Feng Xiong; Man Shi; Ning Li; Jinyi Deng; Tianbao Chen; Leibo Liu; Shaojun Wei; Yuan Xie 001; et al. (IEEE J. Solid State Circuits, 2021)

Mixed-granularity parallel coarse-grained reconfigurable architecture. - Jinyi Deng; Linyun Zhang; Lei Wang; Jiawei Liu; Kexiang Deng; Shibin Tang; Jiangyuan Gu; Boxiao Han; Fei Xu; Leibo Liu; Shaojun Wei; Shouyi Yin (DAC, 2022)

Towards Efficient Control Flow Handling in Spatial Architecture via Architecting the Control Flow Plane. - Jinyi Deng; Xinru Tang; Jiahao Zhang; Yuxuan Li; Linyun Zhang; Boxiao Han; Hongjun He; Fengbin Tu; Leibo Liu; Shaojun Wei; Yang Hu 001; Shouyi Yin (MICRO, 2023)

Towards Efficient Control Flow Handling in Spatial Architecture via Architecting the Control Flow Plane. - Jinyi Deng; Xinru Tang; Jiahao Zhang; Yuxuan Li; Linyun Zhang; Fengbin Tu; Leibo Liu; Shaojun Wei; Yang Hu 001; Shouyi Yin (CoRR, 2023)

Exploiting Similarity Opportunities of Emerging Vision AI Models on Hybrid Bonding Architecture. - Zhiheng Yue; Huizheng Wang; Jiahao Fang; Jinyi Deng; Guangyang Lu; Fengbin Tu; Ruiqi Guo; Yuxuan Li; Yubin Qin; Yang Wang 089; Chao Li 009; Huiming Han; et al. (ISCA, 2024)

Generating lymphoma ultrasound image description with transformer model. - Jinyi Deng; Dehua Chen; Chunlin Zhang; Yijie Dong (Comput. Biol. Medicine, 2024)

Efficient Orchestrated AI Workflows Execution on Scale-out Spatial Architecture. - Jinyi Deng; Xinru Tang; Zhiheng Yue; Guangyang Lu; Qize Yang; Jiahao Zhang; Jinxi Li; Chao Li 009; Shaojun Wei; Yang Hu 001; Shouyi Yin (CoRR, 2024)

PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training. - Jiahao Fang; Huizheng Wang; Qize Yang; Dehao Kong; Xu Dai; Jinyi Deng; Yang Hu 001; Shouyi Yin (CoRR, 2024)

PD Constraint-aware Physical/Logical Topology Co-Design for Network on Wafer. - Qize Yang; Taiquan Wei; Sihan Guan; Chengran Li; Haoran Shang; Jinyi Deng; Huizheng Wang; Chao Li 009; Lei Wang; Yan Zhang; Shouyi Yin; Yang Hu 001 (ISCA, 2025)

Cramming a Data Center into One Cabinet, a Co-Exploration of Computing and Hardware Architecture of Waferscale Chip. - Xingmao Yu; Dingcheng Jiang; Jinyi Deng; Jingyao Liu; Chao Li 009; Shouyi Yin; Yang Hu 001 (ISCA, 2025)

Rethinking Control Flow in Spatial Architectures: Insights Into Control Flow Plane Design. - Jinyi Deng; Xinru Tang; Jiahao Zhang; Yuxuan Li; Linyun Zhang; Fengbin Tu; Shaojun Wei; Yang Hu 001; Shouyi Yin (IEEE Trans. Computers, 2025)