TL-CSE: Microarchitecture-Compiler Co-design Space Exploration via Transfer Learning. - Zheng Wu; Jinyi Shen; Xuyang Zhao; Changxu Liu; Li Shang; Fan Yang 001 (ASP-DAC, 2025)

INTO-OA: Interpretable Topology Optimization for Operational Amplifiers. - Jinyi Shen; Fan Yang 001; Li Shang; Zhaori Bi; Changhao Yan; Dian Zhou; Xuan Zeng 001 (DATE, 2025)

ATOM: An Automatic Topology Synthesis Framework for Operational Amplifiers. - Jinyi Shen; Fan Yang 001; Li Shang; Changhao Yan; Zhaori Bi; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Prior-Boosted GRL: Microarchitecture Design Space Exploration via Graph Representation Learning. - Zheng Wu; Jinyi Shen; Xiaoling Yi; Li Shang; Fan Yang 001; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)